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MX25U1635FZNI-10G: 产品描述IC FLASH 16MBIT; 产品类别存储; 文件大小2MB，共96页; 制造商Macronix; 官网地址http://www.macronix.com/en-us/Pages/default.aspx

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MX25U1635FZNI-10G概述

IC FLASH 16MBIT

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MX25U1635F

1.8V, 16M-BIT [x 1/x 2/x 4]

CMOS MXSMIO

(SERIAL MULTI I/O)

FLASH MEMORY

Key Features

• Fast read for SPI mode and QPI mode

• 1.65 to 2.0 volt for read, erase, and program operations

• 12-WLCSP (Wafer-Level Chip Scale Package)

• Multi I/O Support - Single I/O, Dual I/O and Quad I/O

• Program Suspend/Resume & Erase Suspend/Resume

P/N: PM1901

Rev. 1.6, January 17, 2017

MX25U1635F

Contents

1. FEATURES .............................................................................................................................................................. 4

2. GENERAL DESCRIPTION ..................................................................................................................................... 6

Table 1. Additional Feature..........................................................................................................................7

3. PIN CONFIGURATIONS ......................................................................................................................................... 8

4. PIN DESCRIPTION .................................................................................................................................................. 8

5. BLOCK DIAGRAM................................................................................................................................................... 9

6. DATA PROTECTION.............................................................................................................................................. 10

Table 2. Protected Area Sizes ................................................................................................................... 11

Table 3. 4K-bit Secured OTP Definition

....................................................................................................12

7. MEMORY ORGANIZATION ................................................................................................................................... 13

Table 4. Memory Organization ..................................................................................................................13

8. DEVICE OPERATION ............................................................................................................................................ 14

8-1. Quad Peripheral Interface (QPI) Read Mode .......................................................................................... 16

9. COMMAND DESCRIPTION ................................................................................................................................... 17

9-1.

9-2.

9-3.

9-4.

9-5.

9-6.

9-7.

9-8.

9-9.

9-10.

9-11.

9-12.

9-13.

9-14.

9-15.

9-16.

9-17.

9-18.

9-19.

9-20.

9-21.

9-22.

9-23.

9-24.

9-25.

P/N: PM1901

Table 5. Command Set..............................................................................................................................17

Write Enable (WREN) .............................................................................................................................. 21

Write Disable (WRDI)............................................................................................................................... 22

Read Identification (RDID)

....................................................................................................................... 23

Release from Deep Power-down (RDP), Read Electronic Signature (RES) ........................................... 24

Read Electronic Manufacturer ID & Device ID (REMS) ........................................................................... 26

QPI ID Read (QPIID) ............................................................................................................................... 27

Table 6. ID Definitions

..............................................................................................................................27

Read Status Register (RDSR) ................................................................................................................. 28

Write Status Register (WRSR)................................................................................................................. 32

Table 7. Protection Modes.........................................................................................................................33

Read Data Bytes (READ) ........................................................................................................................ 36

Read Data Bytes at Higher Speed (FAST_READ) .................................................................................. 37

Dual Read Mode (DREAD) ...................................................................................................................... 39

2 x I/O Read Mode (2READ) ................................................................................................................... 40

Quad Read Mode (QREAD) .................................................................................................................... 41

4 x I/O Read Mode (4READ) ................................................................................................................... 42

Burst Read ............................................................................................................................................... 45

Performance Enhance Mode ................................................................................................................... 46

Performance Enhance Mode Reset ......................................................................................................... 49

Sector Erase (SE) .................................................................................................................................... 50

Block Erase (BE32K) ............................................................................................................................... 51

Block Erase (BE) ..................................................................................................................................... 52

Chip Erase (CE) ....................................................................................................................................... 53

Page Program (PP) ................................................................................................................................. 54

4 x I/O Page Program (4PP) .................................................................................................................... 56

Deep Power-down (DP) ........................................................................................................................... 57

Enter Secured OTP (ENSO) .................................................................................................................... 58

Rev. 1.6, January 17, 2017

MX25U1635F

9-26. Exit Secured OTP (EXSO) ....................................................................................................................... 58

9-27. Read Security Register (RDSCUR) ......................................................................................................... 58

Table 8. Security Register Definition

.........................................................................................................59

9-28. Write Security Register (WRSCUR)......................................................................................................... 59

9-29. Write Protection Selection (WPSEL)........................................................................................................ 60

9-30. Single Block Lock/Unlock Protection (SBLK/SBULK) .............................................................................. 63

9-31. Read Block Lock Status (RDBLOCK) ...................................................................................................... 65

9-32. Gang Block Lock/Unlock (GBLK/GBULK) ............................................................................................... 65

9-33. Program Suspend and Erase Suspend ................................................................................................... 66

Table 9. Readable Area of Memory While a Program or Erase Operation is Suspended .........................66

Table 10. Acceptable Commands During Program/Erase Suspend after tPSL/tESL ................................67

Table 11. Acceptable Commands During Suspend (tPSL/tESL not required) ...........................................67

9-34. Program Resume and Erase Resume ..................................................................................................... 69

9-35. No Operation (NOP) ................................................................................................................................ 69

9-36. Software Reset (Reset-Enable (RSTEN) and Reset (RST)) ................................................................... 69

9-37. Read SFDP Mode (RDSFDP).................................................................................................................. 71

Table 12. Signature and Parameter Identification Data Values

................................................................72

Table 13. Parameter Table (0): JEDEC Flash Parameter Tables ..............................................................73

Table 14. Parameter Table (1): Macronix Flash Parameter Tables ...........................................................75

10. RESET.................................................................................................................................................................. 77

Table 15. Reset Timing..............................................................................................................................77

11. POWER-ON STATE ............................................................................................................................................. 78

12. ELECTRICAL SPECIFICATIONS ........................................................................................................................ 79

Table 16. Absolute Maximum Ratings .......................................................................................................79

Table 17. Capacitance...............................................................................................................................79

Table 18. DC Characteristics.....................................................................................................................81

Table 19. AC Characteristics ....................................................................................................................82

13. OPERATING CONDITIONS ................................................................................................................................. 84

Table 20. Power-Up Timing and VWI Threshold

.......................................................................................86

13-1. Initial Delivery State ................................................................................................................................. 86

14. ERASE AND PROGRAMMING PERFORMANCE .............................................................................................. 87

15. LATCH-UP CHARACTERISTICS ........................................................................................................................ 87

16. ORDERING INFORMATION ................................................................................................................................ 88

17. PART NAME DESCRIPTION ............................................................................................................................... 89

18. PACKAGE INFORMATION .................................................................................................................................. 90

18-1. 8-pin SOP (200mil) .................................................................................................................................. 90

18-2. 8-land WSON (6mm x 5mm).................................................................................................................... 91

18-3. 8-land USON (4mm x 4mm) .................................................................................................................... 92

18-4. 8-land USON (4mm x 3mm) .................................................................................................................... 93

18-5. 12-ball WLCSP ........................................................................................................................................ 94

19. REVISION HISTORY ........................................................................................................................................... 95

P/N: PM1901

Rev. 1.6, January 17, 2017

MX25U1635F

Figures

Figure 1. Serial Modes Supported ...............................................................................................................................................15

Figure 2. Serial Input Timing ........................................................................................................................................................16

Figure 3. Output Timing ...............................................................................................................................................................16

Figure 4. Enable QPI Sequence (Command 35H) ......................................................................................................................17

Figure 5. Reset QPI Mode (Command F5H) ...............................................................................................................................17

Figure 6. Write Enable (WREN) Sequence (SPI Mode) ..............................................................................................................22

Figure 7. Write Enable (WREN) Sequence (QPI Mode) ..............................................................................................................22

Figure 8. Write Disable (WRDI) Sequence (SPI Mode) ...............................................................................................................23

Figure 9. Write Disable (WRDI) Sequence (QPI Mode)...............................................................................................................23

Figure 10. Read Identification (RDID) Sequence (SPI mode only)

..............................................................................................24

Figure 11. Read Electronic Signature (RES) Sequence (SPI Mode) ...........................................................................................25

Figure 12. Read Electronic Signature (RES) Sequence (QPI Mode) ..........................................................................................26

Figure 13. Release from Deep Power-down (RDP) Sequence (SPI Mode) ................................................................................26

Figure 14. Release from Deep Power-down (RDP) Sequence (QPI Mode) ................................................................................26

Figure 15. Read Electronic Manufacturer & Device ID (REMS) Sequence (SPI Mode only) .....................................................27

Figure 16. Read Status Register (RDSR) Sequence (SPI Mode) ...............................................................................................29

Figure 17. Read Status Register (RDSR) Sequence (QPI Mode) ...............................................................................................29

Figure 18. Program/Erase flow with read array data

...................................................................................................................30

Figure 19. Program/Erase flow without read array data (read P_FAIL/E_FAIL flag)

...................................................................31

Figure 20. Write Status Register (WRSR) Sequence (SPI Mode) ..............................................................................................33

Figure 21. Write Status Register (WRSR) Sequence (QPI Mode)..............................................................................................33

Figure 22. WRSR flow

.................................................................................................................................................................35

Figure 23. WP# Setup Timing and Hold Timing during WRSR when SRWD=1 ..........................................................................36

Figure 24. Read Data Bytes (READ) Sequence (SPI Mode only) ...............................................................................................37

Figure 25. Read at Higher Speed (FAST_READ) Sequence (SPI Mode) ...................................................................................39

Figure 26. Read at Higher Speed (FAST_READ) Sequence (QPI Mode) ...................................................................................39

Figure 27. Dual Read Mode Sequence (Command 3B) ..............................................................................................................40

Figure 28. 2 x I/O Read Mode Sequence (SPI Mode only) .........................................................................................................41

Figure 29. Quad Read Mode Sequence (Command 6B).............................................................................................................42

Figure 30. 4 x I/O Read Mode Sequence (SPI Mode) .................................................................................................................44

Figure 31. 4 x I/O Read Mode Sequence (QPI Mode).................................................................................................................44

Figure 32. W4READ (Quad Read with 4 dummy cycles) Sequence ..........................................................................................45

Figure 33. SPI Mode ....................................................................................................................................................................46

Figure 34. QPI Mode ...................................................................................................................................................................46

Figure 35. 4 x I/O Read enhance performance Mode Sequence (SPI Mode) .............................................................................48

Figure 36. 4 x I/O Read enhance performance Mode Sequence (QPI Mode).............................................................................49

Figure 37. Performance Enhance Mode Reset for Fast Read Quad I/O (SPI Mode) ..................................................................50

Figure 38. Performance Enhance Mode Reset for Fast Read Quad I/O (QPI Mode) .................................................................50

Figure 39. Sector Erase (SE) Sequence (SPI Mode) .................................................................................................................51

Figure 40. Sector Erase (SE) Sequence (QPI Mode) .................................................................................................................51

Figure 41. Block Erase 32KB (BE32K) Sequence (SPI Mode)...................................................................................................52

Figure 42. Block Erase 32KB (BE32K) Sequence (QPI Mode) ..................................................................................................52

Figure 43. Block Erase (BE) Sequence (SPI Mode) ....................................................................................................................53

Figure 44. Block Erase (BE) Sequence (QPI Mode) ...................................................................................................................53

Figure 45. Chip Erase (CE) Sequence (SPI Mode) ....................................................................................................................54

Figure 46. Chip Erase (CE) Sequence (QPI Mode)....................................................................................................................54

Figure 47. Page Program (PP) Sequence (SPI Mode) ................................................................................................................56

Figure 48. Page Program (PP) Sequence (QPI Mode) ...............................................................................................................56

Figure 49. 4 x I/O Page Program (4PP) Sequence (SPI Mode only)...........................................................................................57

Figure 50. Deep Power-down (DP) Sequence (SPI Mode) .........................................................................................................58

Figure 51. Deep Power-down (DP) Sequence (QPI Mode) .........................................................................................................58

Figure 52. Write Protection Selection (WPSEL) Sequence (Command 68) ...............................................................................62

Figure 53. WPSEL Flow...............................................................................................................................................................63

Figure 54. Block Lock Flow ..........................................................................................................................................................64

Figure 55. Block Unlock Flow ......................................................................................................................................................65

Figure 56. Suspend to Read Latency ..........................................................................................................................................69

Figure 57. Resume to Suspend Latency .....................................................................................................................................69

Figure 58. Suspend to Program Latency .....................................................................................................................................69

Figure 59. Resume to Read Latency ...........................................................................................................................................70

Figure 60. Software Reset Recovery ...........................................................................................................................................71

Figure 61. Reset Sequence (SPI mode) ......................................................................................................................................71

Figure 62. Reset Sequence (QPI mode) .....................................................................................................................................71

Figure 63. Read Serial Flash Discoverable Parameter (RDSFDP) Sequence ............................................................................72

Figure 64. RESET Timing ............................................................................................................................................................78

Figure 65. Maximum Negative Overshoot Waveform ..................................................................................................................80

Figure 66. Maximum Positive Overshoot Waveform....................................................................................................................80

Figure 67. Input Test Waveforms and Measurement Level .........................................................................................................81

Figure 68. Output Loading ...........................................................................................................................................................81

Figure 69. AC Timing at Device Power-Up ..................................................................................................................................85

Figure 70. Power-Down Sequence ..............................................................................................................................................86

Figure 71. Power-up Timing .........................................................................................................................................................87

Rev. 1.6, January 17, 2017

P/N: PM1901

MX25U1635FZNI-10G相似产品对比

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MX25U1635FZNI-10G

MX25U1635FZNI-10G概述

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