Datasheet> 器件分类 > 开发板/开发套件/开发工具> CDBWM8958-M-1

CDBWM8958-M-1: 产品描述EVAL BD - WM8958 MINI BOARD; 产品类别开发板/开发套件/开发工具; 文件大小4MB，共377页; 制造商Cirrus Logic(凌云半导体); 官网地址http://www.cirrus.com; 标准

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CDBWM8958-M-1概述

EVAL BD - WM8958 MINI BOARD

CDBWM8958-M-1规格参数

参数名称	属性值
类型	音频
功能	CODEC
使用的 IC/零件	WM8958
所含物品	板

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DESCRIPTION

The WM8958 is a highly integrated ultra-low power hi-fi

CODEC designed for smartphones and other portable devices

rich in multimedia features.

An integrated stereo class D/AB speaker driver and class W

headphone driver minimize power consumption during audio

playback.

The device requires only two voltage supplies, with all other

internal supply rails generated from integrated LDOs.

Stereo full duplex asynchronous sample rate conversion and

multi-channel digital mixing combined with powerful analogue

mixing allow the device to support a huge range of different

architectures and use cases.

A multiband compressor and programmable parametric EQ

provide volume maximisation and speaker compensation in the

digital playback paths. The dynamic range controller can be

used in record or playback paths for maintaining a constant

signal level, maximizing loudness and protecting speakers

against overloading and clipping.

A smart digital microphone interface provides power regulation,

a low jitter clock output and decimation filters for up to four

digital microphones. Microphone activity detection with interrupt

is available. Impedance sensing and measurement is provided

for external accessory / push-button detection.

Fully differential internal architecture and on-chip RF noise filters

ensure a very high degree of noise immunity. Active ground loop

noise rejection and DC offset correction help prevent pop noise

and suppress ground noise on the headphone outputs.



[1]

WM8958

Multi-Channel Audio Hub CODEC for Smartphones

FEATURES



24-bit 4-channel hi-fi DAC and 2-channel hi-fi ADC

100dB SNR during DAC playback (‘A’ weighted)

Smart MIC interface

- Power, clocking and data input for up to four digital MICs

- High performance analogue MIC interface

- MIC activity detect & interrupt allows processor to sleep

- Impedance sensing for accessory / push-button detection

2W stereo (2 x 2W) class D/AB speaker driver

Capless Class W headphone drivers

- Integrated charge pump

- 5.3mW total power for DAC playback to headphones

4 Line outputs (single-ended or differential)

BTL Earpiece driver

Digital audio interfaces for multi-processor architecture

- Asynchronous stereo duplex sample rate conversion

- Powerful mixing and digital loopback functions

ReTune Mobile 5-band, 6-channel parametric EQ

Multiband compressor and dynamic range controller

Dual FLL provides all necessary clocks

- Self-clocking modes allow processor to sleep

- All standard sample rates from 8kHz to 96kHz

Active noise reduction circuits

- DC offset correction removes pops and clicks

- Ground loop noise cancellation

Integrated LDO regulators

72-ball W-CSP package (4.516 x 4.258 x 0.698mm)



APPLICATIONS



Smartphones and music phones

Portable navigation

Tablets

eBooks

Portable Media Players

WOLFSON MICROELECTRONICS plc

[1] This product is protected by Patents US 7,622,984, US 7,626,445,US 7,765,019 and GB 2,432,765

Pre-Production, August 2012, Rev 3.4

2012

Wolfson Microelectronics plc

WM8958

TABLE OF CONTENTS

Pre-Production

DESCRIPTION ....................................................................................................... 1

FEATURES ............................................................................................................ 1

APPLICATIONS..................................................................................................... 1

TABLE OF CONTENTS ......................................................................................... 2

BLOCK DIAGRAM ................................................................................................ 7

PIN CONFIGURATION .......................................................................................... 8

ORDERING INFORMATION .................................................................................. 8

PIN DESCRIPTION ................................................................................................ 9

ABSOLUTE MAXIMUM RATINGS ...................................................................... 12

RECOMMENDED OPERATING CONDITIONS ................................................... 13

THERMAL PERFORMANCE ............................................................................... 14

ELECTRICAL CHARACTERISTICS ................................................................... 15

INPUT SIGNAL LEVEL .................................................................................................. 15

INPUT PIN RESISTANCE .............................................................................................. 16

PROGRAMMABLE GAINS............................................................................................. 18

OUTPUT DRIVER CHARACTERISTICS ....................................................................... 19

ADC INPUT PATH PERFORMANCE............................................................................. 20

DAC OUTPUT PATH PERFORMANCE ......................................................................... 21

BYPASS PATH PERFORMANCE.................................................................................. 24

MULTI-PATH CROSSTALK ........................................................................................... 26

DIGITAL INPUT / OUTPUT ............................................................................................ 28

DIGITAL FILTER CHARACTERISTICS ......................................................................... 28

MICROPHONE BIAS CHARACTERISTICS ................................................................... 29

MISCELLANEOUS CHARACTERISTICS ...................................................................... 30

TERMINOLOGY ............................................................................................................. 31

TYPICAL PERFORMANCE ................................................................................. 32

TYPICAL POWER CONSUMPTION .............................................................................. 32

TYPICAL SIGNAL LATENCY ......................................................................................... 33

SPEAKER DRIVER PERFORMANCE ........................................................................... 34

SIGNAL TIMING REQUIREMENTS .................................................................... 35

SYSTEM CLOCKS & FREQUENCY LOCKED LOOP (FLL) .......................................... 35

AUDIO INTERFACE TIMING ......................................................................................... 36

DIGITAL MICROPHONE (DMIC) INTERFACE TIMING .................................................................................................. 36

DIGITAL AUDIO INTERFACE - MASTER MODE ........................................................................................................... 37

DIGITAL AUDIO INTERFACE - SLAVE MODE ............................................................................................................... 38

DIGITAL AUDIO INTERFACE - TDM MODE .................................................................................................................. 39

CONTROL INTERFACE TIMING ................................................................................... 40

DEVICE DESCRIPTION ...................................................................................... 41

INTRODUCTION ............................................................................................................ 41

ANALOGUE INPUT SIGNAL PATH ............................................................................... 43

MICROPHONE INPUTS .................................................................................................................................................. 44

MICROPHONE BIAS CONTROL .................................................................................................................................... 44

MICROPHONE ACCESSORY DETECT ......................................................................................................................... 46

LINE AND VOICE CODEC INPUTS ................................................................................................................................ 46

INPUT PGA ENABLE ...................................................................................................................................................... 47

INPUT PGA CONFIGURATION ...................................................................................................................................... 48

INPUT PGA VOLUME CONTROL ................................................................................................................................... 49

INPUT MIXER ENABLE................................................................................................................................................... 52

INPUT MIXER CONFIGURATION AND VOLUME CONTROL ....................................................................................... 52

DIGITAL MICROPHONE INTERFACE .......................................................................... 56

DIGITAL PULL-UP AND PULL-DOWN ............................................................................................................................ 59

PP, August 2012, Rev 3.4

Pre-Production

WM8958

ANALOGUE TO DIGITAL CONVERTER (ADC) ............................................................ 59

ADC CLOCKING CONTROL ........................................................................................................................................... 60

DIGITAL CORE ARCHITECTURE ................................................................................. 61

DIGITAL MIXING ............................................................................................................ 63

AUDIO INTERFACE 1 (AIF1) OUTPUT MIXING ............................................................................................................. 64

DIGITAL SIDETONE MIXING .......................................................................................................................................... 65

DIGITAL SIDETONE VOLUME AND FILTER CONTROL ............................................................................................... 65

DAC OUTPUT DIGITAL MIXING ..................................................................................................................................... 67

AUDIO INTERFACE 2 (AIF2) DIGITAL MIXING ............................................................................................................. 68

ULTRASONIC (4FS) AIF OUTPUT MODE ...................................................................................................................... 69

MULTIBAND COMPRESSOR (MBC) ............................................................................ 70

RMS LIMITER .................................................................................................................................................................. 71

MBC CLOCKING CONTROL ........................................................................................................................................... 71

MBC CONTROL SEQUENCES ....................................................................................................................................... 72

DYNAMIC RANGE CONTROL (DRC) ........................................................................... 75

DRC COMPRESSION / EXPANSION / LIMITING ........................................................................................................... 76

GAIN LIMITS.................................................................................................................................................................... 78

DYNAMIC CHARACTERISTICS ..................................................................................................................................... 79

ANTI-CLIP CONTROL ..................................................................................................................................................... 79

QUICK RELEASE CONTROL ......................................................................................................................................... 79

SIGNAL ACTIVITY DETECT ........................................................................................................................................... 79

DRC REGISTER CONTROLS ......................................................................................................................................... 80

RETUNE

MOBILE PARAMETRIC EQUALIZER (EQ) ................................................ 89

DEFAULT MODE (5-BAND PARAMETRIC EQ) ............................................................................................................. 90

RETUNE MOBILE MODE............................................................................................................................................. 92

EQ FILTER CHARACTERISTICS ................................................................................................................................... 93

3D STEREO EXPANSION ............................................................................................. 94

DIGITAL VOLUME AND FILTER CONTROL ................................................................. 95

AIF1 - OUTPUT PATH VOLUME CONTROL .................................................................................................................. 95

AIF1 - OUTPUT PATH HIGH PASS FILTER ................................................................................................................... 97

AIF1 - INPUT PATH VOLUME CONTROL ...................................................................................................................... 99

AIF1 - INPUT PATH SOFT MUTE CONTROL .............................................................................................................. 102

AIF1 - INPUT PATH NOISE GATE CONTROL ............................................................................................................. 103

AIF1 - INPUT PATH MONO MIX CONTROL ................................................................................................................. 104

AIF2 - OUTPUT PATH VOLUME CONTROL ................................................................................................................ 104

AIF2 - OUTPUT PATH HIGH PASS FILTER ................................................................................................................. 105

AIF2 - INPUT PATH VOLUME CONTROL .................................................................................................................... 106

AIF2 - INPUT PATH SOFT MUTE CONTROL .............................................................................................................. 106

AIF2 - INPUT PATH NOISE GATE CONTROL ............................................................................................................. 107

AIF2 - INPUT PATH MONO MIX CONTROL ................................................................................................................. 108

DIGITAL TO ANALOGUE CONVERTER (DAC) .......................................................... 109

DAC CLOCKING CONTROL ......................................................................................................................................... 109

DAC DIGITAL VOLUME ................................................................................................................................................ 111

DAC SOFT MUTE AND SOFT UN-MUTE ..................................................................................................................... 114

ANALOGUE OUTPUT SIGNAL PATH ......................................................................... 116

OUTPUT SIGNAL PATHS ENABLE .............................................................................................................................. 117

HEADPHONE SIGNAL PATHS ENABLE ...................................................................................................................... 119

OUTPUT MIXER CONTROL ......................................................................................................................................... 121

SPEAKER MIXER CONTROL ....................................................................................................................................... 125

OUTPUT SIGNAL PATH VOLUME CONTROL ............................................................................................................. 128

SPEAKER BOOST MIXER ............................................................................................................................................ 133

EARPIECE DRIVER MIXER .......................................................................................................................................... 133

LINE OUTPUT MIXERS ................................................................................................................................................ 134

PP, August 2012, Rev 3.4

WM8958

Pre-Production

CHARGE PUMP ........................................................................................................... 138

DC SERVO ................................................................................................................... 140

DC SERVO ENABLE AND START-UP ......................................................................................................................... 140

DC SERVO ACTIVE MODES ........................................................................................................................................ 142

GPIO / INTERRUPT OUTPUTS FROM DC SERVO ..................................................................................................... 143

ANALOGUE OUTPUTS ............................................................................................... 144

SPEAKER OUTPUT CONFIGURATIONS ..................................................................................................................... 144

HEADPHONE OUTPUT CONFIGURATIONS ............................................................................................................... 147

EARPIECE DRIVER OUTPUT CONFIGURATIONS ..................................................................................................... 148

LINE OUTPUT CONFIGURATIONS .............................................................................................................................. 148

EXTERNAL ACCESSORY DETECTION ..................................................................... 151

ACCESSORY DETECTION WITH LOW FREQUENCY SYSCLK................................................................................. 155

GENERAL PURPOSE INPUT/OUTPUT ...................................................................... 156

GPIO CONTROL ........................................................................................................................................................... 156

GPIO FUNCTION SELECT ........................................................................................................................................... 157

BUTTON DETECT (GPIO INPUT) ................................................................................................................................. 159

LOGIC ‘1’ AND LOGIC ‘0’ OUTPUT (GPIO OUTPUT) .................................................................................................. 159

INTERRUPT (IRQ) STATUS OUTPUT .......................................................................................................................... 159

OVER-TEMPERATURE DETECTION ........................................................................................................................... 159

MICROPHONE ACCESSORY STATUS DETECTION .................................................................................................. 160

FREQUENCY LOCKED LOOP (FLL) LOCK STATUS OUTPUT .................................................................................. 160

SAMPLE RATE CONVERTER (SRC) LOCK STATUS OUTPUT ................................................................................. 160

DYNAMIC RANGE CONTROL (DRC) SIGNAL ACTIVITY DETECTION ...................................................................... 161

CONTROL WRITE SEQUENCER STATUS DETECTION ............................................................................................ 163

DIGITAL CORE FIFO ERROR STATUS DETECTION.................................................................................................. 163

OPCLK CLOCK OUTPUT .............................................................................................................................................. 163

FLL CLOCK OUTPUT .................................................................................................................................................... 164

INTERRUPTS .............................................................................................................. 165

DIGITAL AUDIO INTERFACE ...................................................................................... 170

MASTER AND SLAVE MODE OPERATION ................................................................................................................. 171

OPERATION WITH TDM ............................................................................................................................................... 171

AUDIO DATA FORMATS (NORMAL MODE) ................................................................................................................ 172

AUDIO DATA FORMATS (TDM MODE) ....................................................................................................................... 175

DIGITAL AUDIO INTERFACE CONTROL ................................................................... 178

AIF1 - MASTER / SLAVE AND TRI-STATE CONTROL ................................................................................................ 178

AIF1 - SIGNAL PATH ENABLE ..................................................................................................................................... 179

AIF1 - BCLK AND LRCLK CONTROL ........................................................................................................................... 179

AIF1 - DIGITAL AUDIO DATA CONTROL ..................................................................................................................... 182

AIF1 - MONO MODE ..................................................................................................................................................... 183

AIF1 - COMPANDING ................................................................................................................................................... 184

AIF1 - LOOPBACK ........................................................................................................................................................ 186

AIF1 - DIGITAL PULL-UP AND PULL-DOWN ............................................................................................................... 186

AIF2 - MASTER / SLAVE AND TRI-STATE CONTROL ................................................................................................ 187

AIF2 - SIGNAL PATH ENABLE ..................................................................................................................................... 188

AIF2 - BCLK AND LRCLK CONTROL ........................................................................................................................... 188

AIF2 - DIGITAL AUDIO DATA CONTROL ..................................................................................................................... 191

AIF2 - MONO MODE ..................................................................................................................................................... 193

AIF2 - COMPANDING ................................................................................................................................................... 193

AIF2 - LOOPBACK ........................................................................................................................................................ 193

AIF2 - DIGITAL PULL-UP AND PULL-DOWN ............................................................................................................... 194

AIF3 - SIGNAL PATH CONFIGURATION AND TRI-STATE CONTROL....................................................................... 195

AIF3 - BCLK AND LRCLK CONTROL ........................................................................................................................... 197

AIF3 - DIGITAL AUDIO DATA CONTROL ..................................................................................................................... 198

AIF3 - COMPANDING ................................................................................................................................................... 199

AIF3 - LOOPBACK ........................................................................................................................................................ 199

PP, August 2012, Rev 3.4

Pre-Production

WM8958

CLOCKING AND SAMPLE RATES.............................................................................. 200

AIF1CLK ENABLE ......................................................................................................................................................... 201

AIF1 CLOCKING CONFIGURATION ............................................................................................................................ 202

AIF2CLK ENABLE ......................................................................................................................................................... 204

AIF2 CLOCKING CONFIGURATION ............................................................................................................................ 204

MISCELLANEOUS CLOCK CONTROLS ...................................................................................................................... 206

BCLK AND LRCLK CONTROL ...................................................................................................................................... 209

CONTROL INTERFACE CLOCKING ............................................................................................................................ 211

FREQUENCY LOCKED LOOP (FLL) ............................................................................................................................ 211

FREE-RUNNING FLL CLOCK ....................................................................................................................................... 217

GPIO OUTPUTS FROM FLL ......................................................................................................................................... 218

EXAMPLE FLL CALCULATION..................................................................................................................................... 219

EXAMPLE FLL SETTINGS ............................................................................................................................................ 220

SAMPLE RATE CONVERSION ................................................................................... 221

SAMPLE RATE CONVERTER 1 (SRC1) ...................................................................................................................... 221

SAMPLE RATE CONVERTER 2 (SRC2) ...................................................................................................................... 221

SAMPLE RATE CONVERTER RESTRICTIONS .......................................................................................................... 221

SAMPLE RATE CONVERTER CONFIGURATION ERROR INDICATION ................................................................... 222

CONTROL INTERFACE............................................................................................... 224

CONTROL WRITE SEQUENCER................................................................................ 227

INITIATING A SEQUENCE............................................................................................................................................ 227

PROGRAMMING A SEQUENCE .................................................................................................................................. 228

DEFAULT SEQUENCES ............................................................................................................................................... 230

POP SUPPRESSION CONTROL ................................................................................ 237

DISABLED LINE OUTPUT CONTROL .......................................................................................................................... 237

LINE OUTPUT DISCHARGE CONTROL ...................................................................................................................... 238

VMID REFERENCE DISCHARGE CONTROL .............................................................................................................. 238

INPUT VMID CLAMPS .................................................................................................................................................. 238

LDO REGULATORS .................................................................................................... 239

REFERENCE VOLTAGES AND MASTER BIAS ......................................................... 241

POWER MANAGEMENT ............................................................................................. 243

THERMAL SHUTDOWN .............................................................................................. 248

POWER ON RESET..................................................................................................... 249

QUICK START-UP AND SHUTDOWN ........................................................................ 251

SOFTWARE RESET AND DEVICE ID......................................................................... 252

APPLICATIONS INFORMATION ...................................................................... 360

RECOMMENDED EXTERNAL COMPONENTS .......................................................... 360

AUDIO INPUT PATHS ................................................................................................................................................... 360

HEADPHONE OUTPUT PATH ...................................................................................................................................... 361

EARPIECE DRIVER OUTPUT PATH ............................................................................................................................ 362

LINE OUTPUT PATHS .................................................................................................................................................. 362

POWER SUPPLY DECOUPLING ................................................................................................................................. 363

CHARGE PUMP COMPONENTS ................................................................................................................................. 364

MICROPHONE BIAS CIRCUIT ..................................................................................................................................... 364

EXTERNAL ACCESSORY DETECTION COMPONENTS ............................................................................................ 366

CLASS D SPEAKER CONNECTIONS .......................................................................................................................... 367

RECOMMENDED EXTERNAL COMPONENTS DIAGRAM ......................................................................................... 368

DIGITAL AUDIO INTERFACE CLOCKING CONFIGURATIONS................................. 370

PCB LAYOUT CONSIDERATIONS ............................................................................. 373

CLASS D LOUDSPEAKER CONNECTION .................................................................................................................. 373

PP, August 2012, Rev 3.4

CDBWM8958-M-1相似产品对比

	CDBWM8958-M-1	CDKWM8958-S-1
描述	EVAL BD - WM8958 MINI BOARD	KIT - WM8958 KIT CDB6220 MB DC
类型	音频	音频
功能	CODEC	CODEC
使用的 IC/零件	WM8958	WM8958
所含物品	板	板

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