IRG7CH37K10EF
INSULATED GATE BIPOLAR TRANSISTOR
V
CES
= 1200V
I
C(Nominal)
= 15A
T
J(max)
= 175°C
V
CE(on)
typ = 1.9V @ I
C
= 15A
G
E
C
n-channel
Applications
Medium Power Drives
UPS
HEV Inverter
Welding
G
C
E
Gate
Collector
Emitter
Features
Low V
CE(ON)
and switching losses
Square RBSOA and Maximum Junction Temperature 175°C
Positive V
CE (ON)
Temperature Coefficient
Benefits
High efficiency in a wide range of applications
and switching frequencies
Improved reliability due to rugged hard switching
performance and higher power capability
Excellent current sharing in parallel operation
Base part number
IRG7CH37K10EF
Package Type
Die on Film
Standard Pack
Form
Quantity
Wafer
1
Orderable part number
IRG7CH37K10EF
Mechanical Parameter
Die Size
Minimum Street Width
Emiter Pad Size (Included Gate Pad)
Gate Pad Size
Area Total / Active
Thickness
Wafer Size
Notch Position
Maximum-Possible Chips per Wafer
Passivation Front side
Front Metal
Backside Metal
Die Bond
Reject Ink Dot Size
4.763 x 4.763
mm
2
75
µm
See Die Drawing
mm
2
1.0053 x 0.7035
22.69 / 12
140
µm
200
mm
0
Degrees
1206 pcs.
Silicon Nitride
Al, Si (4µm)
Al (1kA°), Ti (1kA°), Ni (4kA°), Ag (6kA°)
Electrically conductive epoxy or solder
0.25 mm diameter minimum
1
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© 2013 International Rectifier
July 11, 2013
IRG7CH37K10EF
Parameter
Collector-Emitter Voltage, T
J
=25°C
DC Collector Current
Clamped Inductive Load Current
Gate Emitter Voltage
Operating Junction and Storage Temperature
Max.
1200
60
± 30
-40 to +175
Units
V
A
A
V
°C
Maximum Ratings
V
CE
I
C
I
LM
V
GE
T
J
, T
STG
Static Characteristics (Tested on wafers) @ T
J
=25°C
Parameter
Min. Typ. Max. Units
Conditions
V
(BR)CES
Collector-to-Emitter Breakdown Voltage 1200 –––
–––
V V
GE
= 0V, I
C
= 250µA
Collector-to-Emitter Saturated Voltage
–––
1.9
2.3
V
GE
= 15V, I
C
= 10A, T
J
= 25°C
V
CE(sat)
Gate-Emitter Threshold Voltage
5.0
–––
7.5
I
C
= 720µA , V
GE
= V
CE
V
GE(th)
I
CES
Zero Gate Voltage Collector Current
–––
1.0
25
µA V
CE
= 1200V, V
GE
= 0V
Gate Emitter Leakage Current
–––
––– ±100 nA V
CE
= 0V, V
GE
= ±30V
I
GES
Electrical Characteristics (Not subject to production test-verified by design/characterization)
Parameter
Min. Typ. Max. Units
Conditions
Collector-to-Emitter Saturated Voltage
–––
1.9
2.3
V V
GE
= 15V, I
C
= 15A , T
J
= 25°C
V
CE(sat)
–––
2.5
–––
V
GE
= 15V, I
C
= 15A , T
J
= 175°C
SCSOA
Short Circuit Safe Operating Area
10
–––
–––
µs V
GE
= 15V, V
CC
= 600V
R
G
= 10, V
P
≤
1200V,T
J
≤150°C
FULL SQUARE
RBSOA
Reverse Bias Safe Operating Area
T
J
= 175°C, I
C
= 60A
V
CC
= 960V, Vp
≤1200V
Rg = 10, V
GE
= +20V to 0V
Input Capacitance
––– 1950 –––
pF V
GE
= 0V
C
iss
V
CE
= 30V
Output Capacitance
–––
77
–––
C
oss
ƒ = 1.0MHz
C
rss
Reverse Transfer Capacitance
–––
46
–––
Q
g
Total Gate Charge (turn-on)
—
80
—
nC I
C
= 100A
V
GE
= 15V
Gate-to-Emitter Charge (turn-on)
—
21
—
Q
ge
V
CC
= 600V
Q
gc
Gate-to-Collector Charge (turn-on)
—
38
—
Switching Characteristics (Inductive Load-Not subject to production test-verified by design/characterization)
Parameter
Min. Typ. Max. Units
Conditions
Turn-On delay time
—
28
—
I
C
= 15A, V
CC
= 600V
t
d(on)
R
G
= 10, V
GE
=15V, L=260µH
Rise time
—
27
—
t
r
T
J
= 25°C
t
d(off)
Turn-Off delay time
—
122
—
t
f
Fall time
—
105
—
ns
t
d(on)
Turn-On delay time
—
26
—
I
C
= 15A, V
CC
= 600V
R
G
= 10, V
GE
=15V, L= 260µH
Rise time
—
26
—
t
r
T
J
= 175°C
t
d(off)
Turn-Off delay time
—
154
—
t
f
Fall time
—
272
—
Notes:
The
current in the application is limited by T
JMax
and the thermal properties of the assembly.
Not subject to production test-verified by design / characterization.
Values influenced by parasitic L and C in measurement.
V
CC
= 80% (V
CES
), V
GE
= 20V, L = 25µH, R
G
= 10.
Refer
to AN-1086 for guidelines for measuring V
(BR)CES
safely.
Die
level characterization.
2
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© 2013 International Rectifier
July 11, 2013
IRG7CH37K10EF
Die Drawing
3
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© 2013 International Rectifier
July 11, 2013
IRG7CH37K10EF
Additional Testing and Screening
For Customers requiring product supplied as Known Good Die (KGD) or requiring specific die level testing, please
contact your local IR Sales
Shipping
Sawn Wafer on Film. Please contact your local IR sales office for non-standard shipping options
Handling
Product must be handled only at ESD safe workstations. Standard ESD precautions and safe work
environments are as defined in MIL-HDBK-263.
Product must be handled only in a class 10,000 or better-designated clean room environment.
Singulated die are not to be handled with tweezers. A vacuum wand with a non-metallic ESD protected tip
should be used.
Wafer/Die Storage
Proper storage conditions are necessary to prevent product contamination and/or degradation after shipment.
Note: To reduce the risk of contamination or degradation, it is recommended that product not being used in the
assembly process be returned to their original containers and resealed with a vacuum seal process.
Sawn wafers on a film frame are intended for immediate use and have a limited shelf life.
Further Information
For further information please contact your local IR Sales office or email your inquiry to
http://die.irf.com
IR WORLD HEADQUARTERS:
101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit
http://www.irf.com/whoto-call/
4
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© 2013 International Rectifier
July 11, 2013
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