LTC1520
50Mbps Precision Quad
Line Receiver
FEATURES
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DESCRIPTION
The LTC
®
1520 is a high speed, precision differential line
receiver that can operate at data rates as high as 50Mbps.
A unique architecture provides very stable propagation
delays and low skew over a wide input common mode,
input overdrive and ambient temperature range. Propaga-
tion delay is 18ns
±3ns,
while typically t
PLH
/t
PHL
skew is
500ps and channel-to-channel skew is 400ps.
Each receiver translates differential input levels (V
ID
≥
100mV) into valid CMOS and TTL output levels. Its high
input resistance (≥ 18k) allows many receivers to be con-
nected to the same driver. The receiver outputs go into a
high impedance state when disabled.
Protection features include thermal shutdown and a con-
trolled maximum short-circuit current (50mA max) that
does not oscillate in and out of short-circuit mode. Input
resistance remains
≥18k
when the device is unpowered or
disabled, thus allowing the LTC1520 to be hot swapped into
a backplane without loading the data lines.
The LTC1520 operates from a single 5V supply and draws
12mA of supply current. The part is available in a 16-lead
narrow SO package.
Precision Propagation Delay: 18ns
±3ns
Over
Temperature
Data Rate: 50Mbps
Low t
PLH
/t
PHL
Skew: 500ps Typ
Low Channel-to-Channel Skew: 400ps Typ
Rail-to-Rail Input Common Mode Range
High Input Resistance:
≥
18k, Even When Unpowered
Hot Swap Capable
Can Withstand Input DC Levels of
±10V
Short-Circuit Protected
Single 5V Supply
LVDS Compatible
Will Not Oscillate with Slow Input Signals
APPLICATIONS
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High Speed Backplane Interface
Line Collision Detector
PECL and LVDS Line Receivers
Level Translator
Ring Oscillator
Tapped Delay Line
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATION
High Speed Backplane Receiver
LTC1520
Propagation Delay Guaranteed to Fall
Within Shaded Area (±3ns)
+
+
–
–
V
IN
=
1V/DIV
RECEIVER
INPUT
V
ID
= 500mV
RECEIVER
OUTPUT
V
DD
= 5V
+
–
V
OUT
=
5V/DIV
+
–
5V
3.3k
–5
3.3k
0.01µF
1520 TA01
0
5
U
U
U
10 15 20 25 30 35 40 45
TIME (ns)
LTC1520 TA02
1
LTC1520
ABSOLUTE
(Note 1)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
B1 1
A1 2
OUT 1 3
ENABLE 4
OUT 2 5
A2 6
B2 7
GND 8
16 V
DD
15 B4
14 A4
13 OUT 4
12 NC
11 OUT 3
10 A3
9
B3
Supply Voltage ....................................................... 10V
Digital Input Currents ..................... – 100mA to 100mA
Digital Input Voltages ............................... – 0.5V to 10V
Receiver Input Voltages ........................................
±10V
Receiver Output Voltages ............. – 0.5V to V
DD
+ 0.5V
Short-Circuit Duration .................................... Indefinite
Operating Temperature Range .................... 0°C to 70°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER PART
NUMBER
LTC1520CS
S PACKAGE
16-LEAD PLASTIC SO
T
JMAX
= 150°C,
θ
JA
= 90°C/ W
Consult factory for Industrial and Military grade parts.
DC ELECTRICAL CHARACTERISTICS
V
DD
= 5V
±5%
(Notes 2, 3) per receiver, unless otherwise noted.
SYMBOL
V
CM
V
IH
V
IL
I
IN1
I
IN2
R
IN
C
IN
V
OC
V
ID(MIN)
dV
ID
V
OH
V
OL
I
OZR
I
DD
I
OSR
CMRR
PARAMETER
Input Common Mode Voltage
Input High Voltage
Input Low Voltage
Input Current
Input Current (A, B)
Input Resistance (Figure 5)
A, B Input Capacitance
Open-Circuit Input Voltage (Figure 5)
Differential Input Threshold Voltage
Input Hysteresis
Output High Voltage
Output Low Voltage
Three-State Output Current
Total Supply Current All 4 Receivers
Short-Circuit Current
Common Mode Rejection Ratio
CONDITIONS
A, B Inputs
Enable Input
Enable Input
Enable Input
V
A
, V
B
= 5V
V
A
, V
B
= 0
– 0.2V
≤
V
CM
≤
V
DD
+ 0.2V
(Note 4)
V
DD
= 5V (Note 4)
– 0.2V < V
CM
< V
DD
+ 0.2V
V
CM
= 2.5V
I
OUT
= – 4mA, V
ID
= 0.1V, V
DD
= 5V
I
OUT
= 4mA, V
ID
= 0.1V, V
DD
= 5V
0V
≤
V
OUT
≤
V
DD
V
ID
≥
0.1V, No Load, Enable = 5V
V
OUT
= 0V, V
OUT
= V
DD
V
CM
= 2.5V, f = 25MHz
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
MIN
– 0.2
2
TYP
MAX
V
DD
+ 0.2
0.8
UNITS
V
V
V
µA
µA
µA
kΩ
pF
–1
– 250
18
3
3.2
– 0.1
20
4.6
3.3
1
250
3.4
0.1
0.4
– 10
12
– 50
45
10
20
50
2
U
V
V
mV
V
V
µA
mA
mA
dB
W
U
U
W W
W
LTC1520
SWITCHI G TI E CHARACTERISTICS
V
DD
= 5V
±5%
(Notes 2, 3) V
ID
= 500mV, V
CM
= 2.5V, unless otherwise noted.
SYMBOL
t
PLH
, t
PHL
t
r
, t
f
t
SKD
t
ZL
t
ZH
t
LZ
t
HZ
t
CH-CH
t
PKG-PKG
PARAMETER
Input-to-Output Propagation Delay
Rise/Fall Times
t
PLH
– t
PHL
Skew
Enable to Output Low
Enable to Output High
Disable from Output Low
Disable from Output High
Channel-to-Channel Skew
Package-to-Package Skew
Minimum Input Pulse Width
f
IN
Maximum Input Frequency
The
q
denotes specifications which apply over the full operating
temperature range.
Note 1:
Absolute Maximum Ratings are those values beyond which the
safety of the device cannot be guaranteed. Recommended: V
DD
= 5V
±5%.
Note 2:
All currents into the device pins are positive; all currents out of the
device pins are negative.
TYPICAL PERFORMANCE CHARACTERISTICS
Propagation Delay (t
PLH
/t
PHL
)
vs Temperature
25
V
CM
= 2.5V
V
ID
= 500mV
PROPAGATION DELAY (ns)
PROPAGATION DELAY (ns)
25
T
A
= 25°C
V
CM
= 2.5V
15
PROPAGATION DELAY (ns)
20
10
5
0
–50 –25
50
25
0
75
TEMPERATURE (°C)
U W
W
U
CONDITIONS
C
L
= 15pF (Figure 1)
C
L
= 15pF
C
L
= 15pF, Same Receiver (Note 5)
C
L
= 15pF (Figure 2)
C
L
= 15pF (Figure 2)
C
L
= 15pF (Figure 2)
C
L
= 15pF (Figure 2)
C
L
= 15pF (Figure 3) (Note 6)
C
L
= 15pF, Same Temperature
(Figure 4, Note 4)
(Note 4)
(Note 4)
q
q
q
q
q
q
q
MIN
15
TYP
18
2.5
500
10
10
20
20
400
1.5
12
40
MAX
21
UNITS
ns
ns
ps
35
35
35
35
ns
ns
ns
ns
ps
ns
ns
MHz
Note 3:
All typicals are given for V
DD
= 5V, T
A
= 25°C.
Note 4:
Guaranteed by design, but not tested.
Note 5:
Worst-case
t
PLH
– t
PHL
skew for a single receiver in a package
over the full operating temperature range.
Note 6:
Maximum difference between any two t
PLH
or t
PHL
transitions in a
single package over the full operating temperature range.
Propagation Delay (t
PLH
/t
PHL
)
vs Input Overdrive
25
Propagation Delay (t
PLH
/t
PHL
)
vs Input Common Mode
T
A
= 25°C
V
ID
= 500mV
20
20
15
15
10
10
5
5
100
125
0
0.05
0
0.1
1
INPUT OVERDRIVE (V)
5
10
0
4
1
3
2
INPUT COMMON MODE (V)
5
LTC1520 G01
1520 G02
LTC1520 G03
3
LTC1520
TYPICAL PERFORMANCE CHARACTERISTICS
Propagation Delay vs Load
Capacitance (t
PLH
/t
PHL
)
30
COMMON MODE REJECTION RATIO (dB)
25
PROPAGATION DELAY (ns)
T
A
= 25°C
V
ID
= 500mV
V
CM
= 2.5V
SUPPLY CURRENT (mA)
20
15
10
5
0
5
15
105
25
35
55
LOAD CAPACITANCE (pF)
Supply Current vs Temperature
and Frequency
25
25°C
0°C
100°C
15
–45°C
SKEW (ps)
400
390
20
SUPPLY CURRENT (mA)
DUTY CYCLE (%)
10
5
1 RECEIVER SWITCHING
0
0
5
15
10
FREQUENCY (MHz)
20
25
1520 G07
PIN FUNCTIONS
B1 (Pin 1):
Receiver 1 Inverting Input.
A1 (Pin 2):
Receiver 1 Noninverting Input.
RO1 (Pin 3):
Receiver 1 Output.
Enable (Pin 4):
Receiver Output Enable Pin. A logic high
input enables the receiver outputs. A logic low input
forces the receiver outputs into a high impedance state.
Do not float.
RO2 (Pin 5):
Receiver 2 Output.
A2 (Pin 6):
Receiver 2 Noninverting Input.
B2 (Pin 7):
Receiver 2 Inverting Input.
GND (Pin 8):
Ground Pin. A ground plane is recommended
for all LTC1520 applications.
B3 (Pin 9):
Receiver 3 Inverting Input.
A3 (Pin 10):
Receiver 3 Noninverting Input.
RO3 (Pin 11):
Receiver 3 Output.
NC (Pin 12):
No Connection.
RO4 (Pin 13):
Receiver 4 Output.
A4 (Pin 14):
Receiver 4 Noninverting Input.
B4 (Pin 15):
Receiver 4 Inverting Input.
V
DD
(Pin 16):
5V Supply Pin. This pin should be decoupled
with a 0.1µF ceramic capacitor as close as possible to the
pin. Recommended: V
DD
= 5V
±5%.
4
U W
1520 G06
CMRR vs Frequency
46.5
46.0
45.5
45.0
44.5
44.0
43.5
43.0
42.5
42.0
10
1k
100k
FREQUENCY (Hz)
10M
LTC1520 G04
Supply Current vs Frequency
50
45
40
35
30
25
20
15
10
1 RECEIVER
SWITCHING
ALL 4
RECEIVERS
SWITCHING
T
A
= 25°C
5
0
0
5
15
10
FREQUENCY (MHz)
20
25
1520 G05
205
Skew vs Temperature (t
SKD
)
50.0
49.5
49.0
Output Duty Cycle vs Frequency
V
IN
= 50% DUTY CYCLE
380
370
360
350
48.5
48.0
47.5
47.0
46.5
46.0
340
–10
10
30
50
70
TEMPERATURE (°C)
90
110
1520 G08
45.5
0
5
15
10
FREQUENCY (MHz)
20
25
1520 G09
U
U
U
LTC1520
SWITCHI G TI E WAVEFOR S
3V
INPUT
t
PLH
OUTPUT
V
DD
/2
2.5V
2.5V
t
PHL
V
DD
/2
1520 F01
Figure 1. Propagation Delay Test Circuit and Waveforms
3V
ENABLE
0V
5V
OUT 1
V
OL
V
OH
OUT 1
0V
t
ZH
S1
RECEIVER
OUTPUT
C
L
1k
S2
1520 F02
1.5V
t
ZL
1.5V
OUTPUT
NORMALLY LOW
1.5V
t
LZ
1.5V
OUTPUT
NORMALLY HIGH
t
HZ
1k
V
DD
Figure 2. Receiver Enable and Disable Timing
Test Circuit and Waveforms
EQUIVALE T I PUT NETWORKS
≥18k
A
≥18k
B
3.3V
B
3.3V
A
≥18k
≥18k
RECEIVER ENABLED, V
DD
= 5V
Figure 5. Input Thevenin Equivalent
W
W
U U
U
2V
INPUT
+
1/4 LTC1520
OUTPUT
15pF
1520 F01b
2.5V
–
3V
INPUT
A1, A2
B1, B2 = 2.5V
2V
CH1 OUT
V
DD
/2
t
CH-CH
V
DD
/2
t
CH-CH
V
DD
/2
V
DD
/2
1520 F03
0.2V
CH2 OUT
0.2V
Figure 3. Any Channel to Any Channel Skew, Same Package
INPUT
A1, B1
V
ID
= 500mV
SAME INPUT FOR BOTH PACKAGES
PACKAGE 1
OUT 1
t
PKG-PKG
PACKAGE 2
OUT 1
1520 F04
t
PKG-PKG
Figure 4. Package-to-Package Propagation Delay Skew
RECEIVER DISABLED OR V
DD
= 0V
1520 F05
5
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