Arria 10 SoC Development Kit Overview...........................................................1-1
General Description.....................................................................................................................................1-1
Handling the Board..................................................................................................................................... 1-5
Installing the Subscription Edition of the Quartus Prime Design Software........................................ 2-2
Activating Your License...................................................................................................................2-3
Installing the Altera SoC Embedded Development Suite (EDS)........................................................... 2-3
Development Kit Installer........................................................................................................................... 2-4
Installing the USB-Blaster Driver.............................................................................................................. 2-5
SD Card Image with Example Software.................................................................................................... 2-5
Development Board Setup.................................................................................. 3-1
Applying Power to the Board......................................................................................................................3-1
Default Switch and Jumper Settings.......................................................................................................... 3-2
Board Test System................................................................................................4-1
Preparing the Board.....................................................................................................................................4-2
Running the Board Test System................................................................................................................. 4-3
Version Selector............................................................................................................................................4-3
Using the Board Test System...................................................................................................................... 4-6
Using the Configure Menu..............................................................................................................4-6
The System Info Tab.........................................................................................................................4-8
The GPIO Tab................................................................................................................................. 4-10
The XCVR Tab................................................................................................................................4-11
The PCIe Tab...................................................................................................................................4-15
The FMCA Tab............................................................................................................................... 4-19
The FMCB Tab................................................................................................................................4-23
The DDR3 Tab................................................................................................................................ 4-27
The DDR4 Tab................................................................................................................................ 4-29
The EEPROM Tab.......................................................................................................................... 4-30
The Power Monitor........................................................................................................................ 4-32
The Clock Control..........................................................................................................................4-34
System Controller Configuration.................................................................................................5-16
FPGA and I/O MUX CPLD Programming over On-Board USB-Blaster II.......................... 5-17
FPGA Programming by HPS........................................................................................................5-19
FPGA Programming by EPCQ Device....................................................................................... 5-19
FPGA Programming over External USB-Blaster.......................................................................5-19
Status Elements...........................................................................................................................................5-20
Board Power Supply...................................................................................................................................5-89
Power Distribution System........................................................................................................... 5-90
Power Measurement...................................................................................................................... 5-90
User Guide Revision History..................................................................................................................... A-1
Compliance and Conformity Statements.................................................................................................A-3
CE EMI Conformity Caution........................................................................................................ A-3
Altera Corporation
Arria 10 SoC Development Kit Overview
2018.08.09
1
UG-20004
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This document describes the hardware features of the Arria
®
10 SoC development board, including the
detailed pin-out and component reference information required to create custom FPGA designs that
interface with all components of the board.
General Description
The Arria 10 SoC development board provides a hardware platform for developing and prototyping low-
power, high-performance, and logic-intensive designs using Altera's
®
Arria 10 SoC. The board provides a
wide range of peripherals and memory interfaces to facilitate the development of Arria 10 SoC designs.
Figure 1-1: Arria 10 SoC Block Diagram
Micro-
USB
2.0
On-Board
USB Blaster
TM
II
& USB Interface
MAX II
FPGA
FMCA FMCB
HPS
Ethernet
V57.1
PCIE EP Ethernet
x2
USB to UART
RS232 UART
Trace
SDI Video
PCI Express
Display Port (TX)
HiLO
HPS DC
HILO
FPGA DC
EPCQ
SFP + Optical Ports
Character
LCD Display
MAX V CPLD
System Controller
I/O MAX V CPLD
Intel Corporation. All rights reserved. Intel, the Intel logo, Altera, Arria, Cyclone, Enpirion, MAX, Nios, Quartus and Stratix words and logos are trademarks of
Intel Corporation or its subsidiaries in the U.S. and/or other countries. Intel warrants performance of its FPGA and semiconductor products to current
specifications in accordance with Intel's standard warranty, but reserves the right to make changes to any products and services at any time without notice.
Intel assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly
agreed to in writing by Intel. Intel customers are advised to obtain the latest version of device specifications before relying on any published information
and before placing orders for products or services.
*Other names and brands may be claimed as the property of others.
ISO
9001:2015
Registered
www.altera.com
101 Innovation Drive, San Jose, CA 95134
1-2
General Description
UG-20004
2018.08.09
Figure 1-2: Overview of the Development Board Features
FPGA_PB[0-3]
PCI Express x8
HPS
Memory
SMA EXT Refclk
Boot Memory
Daughtercard
HPS EXT Refclk
HPS
Ethernet
SW1
Storage Memory
Daughtercard
Warm/Cold
Reset
SMA Ports
SFP + Optical Ports
FPGA
Ethernet
USB
USB UART
FMC B Daughtercard
Port
HPS Clock Source Selection Jumper
SW3 JTAG Switch
Trace x16
FPGA HPS_DP[0-3]
USB Blaster II
JTAG Header
SW4
HPS_PB[0-3]
MAX V CPLD
System Controller
FMC A Daughtercard
Port
RS232 UART
FPGA_LED[0-3]
HPS_LED[0-3]
12V AC
Adapter
J42 FMCA
Voltage
Trace x 4
Character LCD
Display
J33 Clock Cleaner
Source Select
Clock Cleaner
Display Port
SDI Video
FPGA
Memory
Linear
Dongle
Header
On/Off
Switch
J58 FPGA
Power Jumper
J32 FMCB
Voltage
J30 FPGA
Power
For more information about the Arria 10 SoC device family, refer to the Arria 10 SoC documentation
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