INTEGRATED CIRCUITS
CBTD16212
24-bit level shifting bus exchange switch
with 12-bit output enables
Product data
File under Integrated Ciruits ICL03
2001 Sep 28
Philips
Semiconductors
Philips Semiconductors
Product data
24-bit level shifting bus exchange switch
with 12-bit output enables
CBTD16212
FEATURES
•
5
Ω
switch connection between two ports
•
TTL compatible control input levels
•
Designed to be used in level shifting applications
•
Latch-up testing is done to JESDEC Standard JESD78 which
exceeds 100 mA
DESCRIPTION
The CBTD16212 provides 24 bits of high-speed TTL-compatible bus
switching or exchanging. The low on-state resistance of the switch
allows connections to be made with minimal propagation delay.
A diode to V
CC
is integrated into the circuit to allow for level shifting
between 5 V inputs and 3.3 V outputs.
The CBTD16212 operates as 24-bit bus switch or a 12-bit bus
exchanger, which provides data exchanging between the four signal
ports via the data-select (S0–S2) terminals.
The CBT16212 is characterized for operation from –40 to +85
°C.
•
ESD protection exceeds 1500 V HBM per JESD22-114A and
1000 V CDM per JESD22-C101
QUICK REFERENCE DATA
SYMBOL
t
pd
C
IN
C
OUT
r
on
PARAMETER
Propagation delay
An to Bn
Input capacitance
Output capacitance
A1 to A2
CONDITIONS
T
amb
= 25
°C;
GND = 0 V
C
L
= 50 pF; V
CC
= 5 V
V
I
= 0 V or V
CC
Outputs disabled; V
O
= 0 V or V
CC
V
CC
= 5.5 V; V
I
= 0 V
TYPICAL
0.25
4.5
11.5
5
UNIT
ns
pF
pF
Ω
ORDERING INFORMATION
PACKAGES
56-Pin Plastic SSOP
56-Pin Plastic TSSOP
TEMPERATURE RANGE
–40 to +85
°C
–40 to +85
°C
ORDER CODE
CBTD16212DL
CBTD16212DGG
DWG NUMBER
SOT371-1
SOT364-1
NOTE:
1. Standard packing quantities and other packaging data is available at
www.philipslogic.com/support/packages.
FUNCTION TABLE
S2
L
L
L
L
H
H
H
H
S1
L
L
H
H
L
L
H
H
S0
L
H
L
H
L
H
L
H
A1
Z
B1
B2
Z
Z
Z
B1
B2
A2
Z
Z
Z
B1
B2
Z
B2
B1
FUNCTION
Disconnect
A1 = B1
A1 = B2
A2 = B1
A2 = B2
Disconnect
A1 = B1, A2 = B2
A1 = B2, A2 = B1
LOGIC SYMBOL
1A1 2
1 of 12 Channels
54 1B1
H = High voltage level
L = Low voltage level
Z = High impedance “off ” state
1A2
3
53
1B2
FLOW CONTROL
S0
S1
S2
1
56
55
SA00512
2001 Sep 28
2
853–2284 27173
Philips Semiconductors
Product data
24-bit level shifting bus exchange switch
with 12-bit output enables
CBTD16212
PIN CONFIGURATION
PIN DESCRIPTION
PIN NUMBER
SYMBOL
S0, S1, S2
1A1–12A1
1A2–12A2
1B1, 12B1
1B2, 12B2
GND
V
CC
NAME AND FUNCTION
Data select
A1 channel
A2 channel
B1 channel
B2 channel
Ground (0 V)
Positive supply voltage
1, 56, 55
2, 4, 6, 9, 11, 13, 15,
18, 21, 23, 25, 27
3, 5, 7, 10, 12, 14, 16,
20, 22, 24, 26, 28
54, 52, 50, 47, 45, 43,
41, 39, 36, 34, 32, 30
53, 51, 48, 46, 44, 42,
40, 37, 35, 33, 31, 29
8, 19, 38, 49
17
S0
1A1
1A2
2A1
2A2
3A1
3A2
GND
4A1
1
2
3
4
5
6
7
8
9
56 S1
55 S2
54 1B1
53 1B2
52 2B1
51 2B2
50 3B1
49 GND
48 3B2
47 4B1
46 4B2
45 5B1
44 5B2
43 6B1
42 6B2
41 7B1
40 7B2
39 8B1
38 GND
37 8B2
36 9B1
35 9B2
34 10B1
33 10B2
32 11B1
31 11B2
30 12B1
29 12B2
4A2 10
5A1 11
5A2 12
6A1 13
6A2 14
7A1 15
7A2 16
V
CC
17
8A1 18
GND 19
8A2 20
9A1 21
9A2 22
10A1 23
10A2 24
11A1 25
11A2 26
12A1 27
12A2 28
SA00511
2001 Sep 28
3
Philips Semiconductors
Product data
24-bit level shifting bus exchange switch
with 12-bit output enables
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
V
CC
I
IK
V
I
V
OUT
I
OUT
T
stg
PARAMETER
DC supply voltage
DC input diode current
DC input voltage
3
DC output voltage
3
DC output current
Storage temperature range
output in Off or High state
output in Low state
V
I
< 0
CONDITIONS
CBTD16212
RATING
–0.5 to +7.0
–50
–0.5 to +7.0
–0.5 to +5.5
128
–65 to 150
UNIT
V
mA
V
V
mA
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
IH
V
IL
T
amb
DC supply voltage
High-level input voltage
Low-level Input voltage
Operating free-air temperature range
PARAMETER
Min
4.5
2.0
—
–40
Max
5.5
—
0.8
+85
V
V
V
°C
UNIT
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= –40 to +85
°C
Min
V
IK
V
P
I
I
I
CC
∆I
CC
C
I
C
IO(OFF)
Input clamp voltage
Output high pass voltage
Input leakage current
Quiescent supply current
Additional supply current per
input pin
2
Control pins
Port OFF capacitance
V
CC
= 4.5 V; I
I
= –18 mA
See Figure 1, page 6
V
CC
= 0 V; V
I
= 5.5 V
V
CC
= 5.5 V; V
I
= GND or 5.5 V
V
CC
= 5.5 V; I
O
= 0, V
I
= V
CC
or GND
V
CC
= 5.5 V, one input at 3.4 V,
other inputs at V
CC
or GND
V
I
= 3 V or 0 V
V
O
= 3 V or 0 V; S0, S1, S2 = 0 V
V
CC
= 4.5 V; V
1
= 0 V; I
I
= 64 mA
r
on3
A1 to A2
V
CC
= 4.5 V; V
1
= 0 V; I
I
= 30 mA
V
CC
= 4.5 V; V
1
= 2.4 V; I
I
= 15 mA
—
—
—
—
—
—
—
—
—
—
—
Typ
1
—
—
—
—
—
—
4.5
11.5
5
5
16
Max
–1.2
–1.2
10
±1
3.5
2.5
—
—
8
8
35
Ω
V
V
µA
mA
mA
pF
pF
UNIT
NOTES:
1. All typical values are at V
CC
= 5 V, T
amb
= 25
°C
2. This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
CC
or GND.
3. Measured by the voltage drop between the A and the B terminals at the indicated current through the switch.
On-state resistance is determined by the lowest voltage of the two (A or B) terminals.
2001 Sep 28
4
Philips Semiconductors
Product data
24-bit level shifting bus exchange switch
with 12-bit output enables
CBTD16212
AC CHARACTERISTICS
GND = 0 V; t
R;
C
L
= 50 pF
SYMBOL
t
pd
t
en
t
dis
PARAMETER
Propagation delay
1
Output enable time
to High and Low level
Output disable time
from High and Low level
FROM (INPUT)
A or B
S
S
TO
(OUTPUT)
B or A
A or B
A or B
V
CC
= 5.0 V
±0
5 V
5 0
±0.5
Min
—
2
1.5
Max
0.25
0 25
11.5
8.5
ns
ns
ns
UNIT
NOTE:
1. This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the typical on-state
resistance of the switch and a load capacitance of 50 pF, when driven by an ideal voltage source (zero output impedance).
AC WAVEFORMS
V
M
= 1.5 V, V
IN
= GND to 3.0 V
3V
1.5 V
INPUT
0V
t
PLH
t
PHL
V
OH
1.5 V
OUTPUT
V
OL
1.5 V
1.5 V
TEST CIRCUIT AND WAVEFORMS
7V
From Output
Under Test
C
L
= 50 pF
500
Ω
S1
Open
GND
500
Ω
Load Circuit
TEST
t
pd
t
PLZ
/t
PZL
t
PHZ
/t
PZH
S1
open
7V
open
SA00028
Waveform 1. Input (An) to Output (Yn) Propagation Delays
DEFINITIONS
Load capacitance includes jig and probe capacitance;
C
L
=
see AC CHARACTERISTICS for value.
3V
Output Control
(Low-level
enabling )
t
PZL
Output
Waveform 1
S1 at 7 V
(see Note)
t
PZH
Output
Waveform 2
S1 at Open
(see Note)
1.5 V
1.5 V
0V
3.5 V
1.5 V
t
PHZ
V
OH
– 0.3 V
1.5 V
0V
Note:
Waveform 1 is for an output with internal conditions such that
the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that
the output is high except when disabled by the output control.
SA00012
t
PLZ
V
OL
+ 0.3 V
V
OL
V
OH
SA00029
Waveform 2. 3-State Output Enable and Disable Times
2001 Sep 28
5
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