LTC1041
BANG-BANG Controller
FEATURES
s
s
s
DESCRIPTIO
s
s
s
s
Micropower 1.5µW (1 Sample/Second)
Wide Supply Range 2.8V to 16V
High Accuracy
Guaranteed
SET POINT Error
±0.5mV
Max
Guaranteed
Deadband
±0.1%
of Value Max
Wide Input Voltage Range V
+
to Ground
TTL Outputs with 5V Supply
Two
Independent
Ground-Referred Control Inputs
Small Size 8-Pin SO
APPLICATIO S
s
s
s
s
The LTC
®
1041 is a monolithic CMOS BANG-BANG
controller manufactured using Linear Technology’s
enhanced LTCMOS™ silicon gate process. BANG-BANG
loops are characterized by turning the control element
fully ON or fully OFF to regulate the average value of
the parameter to be controlled. The SET POINT input
determines the average control value and the DELTA input
sets the deadband. The deadband is always 2 x DELTA and
is centered around the SET POINT. Independent control
of the SET POINT and deadband, with no interaction, is
made possible by the unique sampling input structure of
the LTC1041.
An external RC connected to the OSC pin sets the sampling
rate. At the start of each sample, internal power to the
analog section is switched on for
≈
80µs. During this time,
the analog inputs are sampled and compared. After the
comparison is complete, power is switched off. This
achieves extremely low average power consumption
at low sampling rates. CMOS logic holds the output
continuously while consuming virtually no power.
To keep system power at an absolute minimum, a switched
power output (V
P-P
) is provided. External loads, such as
bridge networks and resistive dividers, can be driven by
this switched output.
The output logic sense (i.e., ON = V
+
) can be reversed
(i.e., ON = GND) by interchanging the V
IN
and SET POINT
inputs. This has no other effect on the operation of
the LTC1041.
Temperature Control (Thermostats)
Motor Speed Control
Battery Charger
Any ON-OFF Control Loop
, LTC and LT are registered trademarks of Linear Technology Corporation.
LTCMOS is a trademark of Linear Technology Corporation.
TYPICAL APPLICATIO
26V AC 2-WIRE THERMOSTAT
56Ω
0.1µF
4.32k
4.99k
Supply Current vs Sampling Frequency
10000
1000
1
2
8
7
LTC1041
6
5
1µF
DELTA = 0.5°F
10M
I
S
400nA
Ultralow Power 50°F to 100°F (2.4µW) Thermostat
V
S
= 6V
SUPPLY CURRENT, I
S
(µA)
100
10
1
0.1
5k
2N6660
1N4002
(4)
49.9Ω
†
3
4
†
6.81k
+
6V
LTC1041 • TA01
ALL RESISTORS 1%.
YELLOW SPRINGS INSTRUMENT CO., INC. P/N 44007.
DRIVING THERMISTOR WITH V
P-P
ELIMINATES 3.8°F ERROR DUE TO SELF-HEATING
0.01
0.1
1
10
100
1000
SAMPLING FREQUENCY, f
S
(Hz)
10000
LTC1041 • TA02
U
TOTAL SUPPLY
CURRENT
LTC1041 SUPPLY
CURRENT
1041fa
U
U
1
LTC1041
ABSOLUTE
(Note 1)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
ON / OFF
V
IN
SET POINT
GND
1
2
3
4
8
7
6
5
V
+
Total Supply Voltage (V
+
to V
–
) .............................. 18V
Input Voltage ........................ (V
+
+ 0.3V) to (V
–
– 0.3V)
Operating Temperature Range
LTC1041C ......................................... –40°C to 85°C
LTC1041M
(OBSOLETE)
.................. – 55°C to125°C
Storage Temperature Range ................. – 55°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
Output Short Circuit Duration ....................... Continuous
ORDER PART
NUMBER
LTC1041CN8
LTC1041CS8
V
P-P
OSC
DELTA
N8 PACKAGE
S8 PACKAGE
8-LEAD PDIP
8-LEAD PDIP
T
JMAX
= 110°C,
θ
JA
= 150°C/W (N8)
T
JMAX
= 150°C,
θ
JA
= 150°C/W (S8)
J8 PACKAGE
8-LEAD CERDIP
T
JMAX
= 150°C,
θ
JA
= 100°C/W
LTC1041MJ8
OBSOLETE PACKAGE
Consider the N8 Package as an Alternate Source
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
SET POINT Error (Note 3)
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. Test Conditions: V
+
= 5V, unless otherwise specified.
CONDITIONS
V
+
= 2.8V to 6V (Note 2)
q
MIN
V
+
= 6V to 15V (Note 2)
q
Deadband Error (Note 4)
V
+
= 2.8V to 6V (Note 2)
q
V
+
= 6V to 15V (Note 2)
q
I
OS
R
IN
P
SR
I
S(ON)
I
S(OFF)
t
D
V
OH
V
OL
R
EXT
f
S
Input Current
Equivalent Input Resistance
Input Voltage Range
Power Supply Range
Power Supply ON
Current (Note 6)
Power Supply OFF
Current (Note 6)
Response Time (Note 7)
ON/OFF Output (Note 8)
Logical “1” Output Voltage
Logical “0” Output Voltage
External Timing Resistor
Sampling Frequency
V
+
= 5V, T
A
= 25°C, OSC = GND
TC1041M/LTC1041C
TYP
±0.3
+
±0.05
±1
+
±0.05
±0.6
+
±0.1
±2
+
±0.1
±0.3
15
MAX
±0.5
+
±0.1
±3
+
±0.1
±1
+
±0.2
±6
+
±0.2
UNITS
mV
% of DELTA
mV
% of DELTA
mV
% of DELTA
% of DELTA
nA
MΩ
V
V
mA
µA
µA
µs
V
V
kΩ
Hz
(V
IN
, SET POINT and DELTA Inputs)
f
S
= 1kHz (Note 5)
q
q
q
10
GND
2.8
V
+
= 5V, V
P-P
ON
q
1.2
0.001
0.001
80
4.4
0.25
5
V
+
16
3
0.5
5
100
V
+
= 5V, V
P-P
OFF
V
+
= 5V
LTC1041C
LTC1041M
q
q
60
q
q
V
+
= 4.75V, I
OUT
= –360µA
V
+
= 4.75V, I
OUT
= 1.6mA
Resistor Connected between V
+
and OSC Pin
V
+
= 5V, T
A
= 25°C,
R
EXT
= 1M C
EXT
= 0.1µF
2.4
100
0.4
10,000
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
Applies over input voltage range limit and includes gain
uncertainty.
1041fa
2
U
W
U
U
W W
W
LTC1041
ELECTRICAL CHARACTERISTICS
Note 3:
SET POINT error
≡
+
(
V
U
2 V
L
)
– SET POINT
where V
U
= upper band limit and V
L
= lower band limit.
Note 4:
Deadband error
≡
(V
U
– V
L
) – 2 • DELTA where V
U
= upper band
limit and V
L
= lower band limit.
Note 5:
R
IN
is guaranteed by design and is not tested.
R
IN
= 1/(f
S
x 66pF).
Note 6:
Average supply current = t
D
• I
S(ON)
• f
S
+ (1 – t
D
• f
S
) l
S(OFF)
.
Note 7:
Response time is set by an internal oscillator and is independent
of overdrive voltage. t
D
= V
P-P
pulse width.
Note 8:
Output also capable of meeting EIA/JEDEC standard B series
CMOS drive specifications.
TYPICAL PERFOR A CE CHARACTERISTICS
I
S(ON)
20
18
16
14
vs V
+
2.2
NORMALIZED SAMPLING FREQUENCY
(f
S
AT 5V, 25°C)
T
A
= 125°C
1.6
1.4
1.2
1.0
0.8
T
A
= – 55°C
0.6
0
2
8
10 12
4
6
SUPPLY VOLTAGE, V
+
(V)
14
16
T
A
= 25°C
I
S(ON)
(mA)
12
10
8
6
4
2
0
2
4
10
8
6
12
SUPPLY VOLTAGE, V
+
(V)
125°C
–55°C
25°C
SAMPLE RATE, f
S
(Hz)
Response Time
vs Supply Voltage
300
250
RESPONSE TIME, t
D
(µs)
T
A
= 25°C
200
150
100
50
0
2
4
10
14
8
12
6
+
SUPPLY VOLTAGE, V (V)
16
RESPONSE TIME, t
D
(µs)
U W
14
16
LTC1041 • TPC01
Normalized Sampling
Frequency vs V
+
, Temperature
R = 1M, C = 0.1µF
10
3
Sampling Rate vs R
EXT
, C
EXT
C
EXT
= 1000pF
2.0
1.8
10
2
C
EXT
= 0.01µF
10
C
EXT
= 0.05µF
C
EXT
= 0.1µF
1
C
EXT
= 1µF
0.1
100k
1M
R
EXT
(Ω)
10M
LTC1041 • TPC03
LTC1041 • TPC02
Response Time
vs Temperature
130
120
110
100
90
80
70
60
50
40
–50
0
25
–25
75 100
50
AMBIENT TEMPERATURE, T
A
(°C)
125
V
+
= 5V
LTC1041 • TPC04
LTC1041 • TPC05
1041fa
3
LTC1041
TYPICAL PERFOR A CE CHARACTERISTICS
V
P-P
Output Voltage
vs Load Current
AVERAGE INPUT RESISTANCE, R
IN
(1/f
S
• 66pF) (Ω)
TYPICAL OUTPUT VOLTAGE DROP (V
+
– V
P-P
)
(V)
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0
1
2
3 4 5 6 7 8
LOAD CURRENT, I
L
(mA)
9
10
V = 2.8V
+
APPLICATIO S I FOR ATIO
The LTC1041 uses sampled data techniques to achieve
its unique characteristics. It consists of two comparators,
each of which has two differential inputs (Figure 1a).
When the sum of the voltages on a comparator’s inputs is
positive, the output is high and when the sum is negative,
the output is low. The inputs are interconnected such that
V
+
(8)
COMP A
4
ON/OFF
(1)
V
IN
(2)
+
–
+
–
ON/OFF OUTPUT
SET POINT
(3)
DELTA
(5)
GND
(4)
OSC
(6)
C
EXT
+
–
+
–
COMP B
V
+
4
R
EXT
V
+
V
P-P
CIRCUIT
V
P-P
(7)
TIMING
GENERATOR
POWER ON
80µs
(a)
Figure 1. LTC1041 Block Diagram
4
U
W
U W
V
+
= 16V
R
IN
vs Sampling Frequency
10
11
10
10
V
+
= 10V
10
9
V
+
= 5V
10
8
10
7
1
10
10
2
10
3
SAMPLING FREQUENCY f
S
(Hz)
10
4
LTC1041 • TPC06
LTC1041 • TPC07
U U
the R
S
flip-flop is reset (ON/OFF = GND) when
V
IN
> (SET POINT + DELTA) and is set (ON/OFF = V
+
) when
V
IN
< (SET POINT – DELTA). This makes a very precise
hysteresis loop of 2 • DELTA centered around the
SET POINT. (See Figure 1b.)
For R
S
< 10kΩ
The dual differential input structure is made with CMOS
switches and a precision capacitor array. Input
impedance characteristics of the LTC1041 can be
determined from the equivalent circuit shown in Figure 2.
The input capacitance will charge with a time constant of
SET POINT
DELTA –
+
DELTA
V
+
DEADBAND
GND
0V
V
L
INPUT VOLTAGE, V
IN
V
U
LTC1041 • AI01b
LTC1041 • AI01a
(b)
1041fa
LTC1041
APPLICATIO S I FOR ATIO
R
S
V
IN
C
S
S1
C
IN
(≈ 33pF)
+
S2
–
V
–
LTC1041 DIFFERENTIAL INPUT
LTC1041 • AI01
Figure 2. Equivalent Input Circuit
R
S
• C
IN
. The ability to fully charge C
IN
from the signal
source during the controller’s active time is critical in
determining errors caused by the input charging current.
For source resistances less than 10kΩ, C
IN
fully charges
and no error is caused by the charging current.
For R
S
> 10kΩ
For source resistances greater than 10kΩ, C
IN
cannot fully
charge, causing voltage errors. To minimize these errors,
an input bypass capacitor, C
S
, should be used. Charge is
shared between C
IN
and C
S
, causing a small voltage error.
The magnitude of this error is A
V
= V
IN
• C
IN
(C
IN
+ C
S
). This
error can be made arbitrarily small by increasing C
S
.
The averaging effect of the bypass capacitor, C
S
, causes
another error term. Each time the input switches cycle
between the plus and minus inputs, C
IN
is charged and
discharged. The average input current due to this is
I
AVG
= V
IN
• C
IN
• f
S
, where f
S
is the sampling frequency.
Because the input current is directly proportional to the
differential input voltage, the LTC1041 can be said to have
an average input resistance of R
IN
= V
IN
/I
AVG
= I/(f
S
• C
IN
).
Since two comparator inputs are connected in parallel, R
IN
is one half of this value (see typical curve of R
IN
versus
Sampling Frequency). This finite input resistance causes
an error due to the voltage divider between R
S
and R
IN
.
The input voltage error caused by both of these effects is
V
ERROR
= V
IN
[2C
IN
/(2C
IN
+ C
S
) + R
S
/(R
S
+ R
IN
)].
Example: assume f
S
= 10Hz, R
S
= 1M, C
S
= 1µF, V
IN
= 1V,
V
ERROR
= 1V(66µV + 660µV) = 726µV. Notice that most of
the error is caused by R
IN
. If the sampling frequency is
reduced to 1Hz, the voltage error from the input
impedance effects is reduced to 136µV.
U
Input Voltage Range
The input switches of the LTC1041 are capable of
switching either to the V
+
supply or ground. Consequently,
the input voltage range includes both supply rails. This is
a further benefit of the sampling input structure.
Error Specifications
The only measurable errors on the LTC1041 are the
deviations from “ideal” of the upper and lower switching
levels (Figure 1b). From a control standpoint, the error in
the SET POINT and deadband is critical. These errors may
be defined in terms of V
U
and V
L
.
V
+
V
SET POINT error
≡
U L
– SET POINT
2
deadband error
≡
(
V
U
– V
L
)
– 2 • DELTA
W
U U
The specified error limits (see electrical characteristics)
include error due to offset, power supply variation, gain,
time and temperature.
Pulsed Power (V
P-P
) Output
It is often desirable to use the LTC1041 with resistive
networks such as bridges and voltage dividers. The power
consumed by these resistive networks can far exceed that
of the LTC1041 itself.
At low sample rates the LTC1041 spends most of its time
off. A switched power output, V
P-P
, is provided to drive the
input network, reducing its average power as well. V
P-P
is
switched to V
+
during the controller’s active time (≈ 80µs)
and to a high impedance (open circuit) when internal
power is switched off.
Figure 3 shows the V
P-P
output circuit. The V
P-P
output
voltage is not precisely controlled when driving a load
(see typical curve of V
P-P
Output Voltage vs Load Current).
In spite of this, high precision can be achieved in two ways:
(1) driving ratiometric networks and (2) driving fast set-
tling references.
In ratiometric networks all the inputs are proportional to
V
P-P
(Figure 4). Consequently, the absolute value of V
P-P
does not affect accuracy.
1041fa
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
