LC88FC2H0B
CMOS LSI
16-bit Microcontroller
512K-byte Flash ROM / 24Kbyte RAM / 100-pin
Features
www.onsemi.com
16-channel 12-bit resolution AD converter
Iinfrared remote controller receiver circuit
CRC operating circuit
Internal Reset Function
Performance
83.3ns (12.0MHz) VDD=3.0 to 3.6V Ta=40C to +85C
100ns (10.0MHz) VDD=2.7 to 3.6V Ta=40C to +85C
TQFP100,14X14
Function Descriptions
Xstromy16 CPU
- 4G-byte address space
- General-purpose registers: 16 bits
16 registers
Ports
- I/O Ports 86
- Power supply pins 8 (VSS1 to VSS4, VDD1 to VDD4)
Timer
PB6/SM1DO
- 16-bit timers
8
P70/AN8
P71/AN9
- Base timer serving as a time-of-day clock
P72/AN10
P73/AN11
Serial interfaces
P74/AN12
P75/AN13
P76/AN14
- Synchronous SIO interfaces
3
P77/AN15
VSS4
(with automatic transmission capability)
VDD4
2
PA0/SO4
- Single master I C/synchronous SIO interface
2
PA1/SI4/SB4
2
PA2/SCK4
- Slave I C/synchronous SIO interface
PA3/SCS4
PA4/SL0CK
- Asynchronous SIO (UART) interfaces
3
PA5/SL0DA
PA6/SL0DO
Multifrequency 12-bit PWM modules
PA7
PC2/FILT
16-channel 12-bit resolution AD converter
P50/P5INT0
P51/P5INT1
P52/P5INT2
Watchdog timer
P53/P5INT3
P54/P5INT4
Infrared remote controller receiver circuit
CRC operating circuit
Real time clock
System clock frequency divider
CF oscillator circuit, Crystal oscillator circuit, RC oscillator circuit
61-source 14-vector interrupt feature
On-chip debugger function
Home audio, White goods
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
P41/INT7
P42
P43/SO1
P44/SI1/SB1
P45/SCK1
P46/PWM0A
P47/PWM0B
P27
P26/T5O
P25/T4O
P24/SM0DO
P23/SM0DA
P22/SM0CK
VDD2
VSS2
P21/INT5
P20/INT4
PD5
PD4
PD3
PD2
PD1
PD0
P17/U2TX
P16/U2RX
P55/P5INT5
P56/P5INT6
P57/P5INT7
TEST
RESB
PC0/XT1
PC1/XT2
VSS1
PC3/CF1
PC4/CF2
VDD1
P60/AN0
P61/AN1
P62/AN2
P63/AN3
P64/AN4
P65/AN5
P66/AN6
P67/AN7
P10/SO0
P11/SI0/SB0
P12/SCK0
P13/U0TX
P14/T3OL/U0RX
P15/T3OH
PB5/SM1DA
PB4/SM1CK
PB3
PB2
PB1
PB0
P37/T7O
P36/T6O
P35/U3TX
P34/U3RX
P33/INT3
P32/INT2/RMIN
P31/INT1
P30/INT0
P07/T0PWMH/U0BRG
P06/T0PWML
P05/P05INT
P04/P04INT
P03/P0INT
P02/P0INT
P01/P0INT
P00/P0INT
VSS3
VDD3
P40/INT6
LC88FC2H0B
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
Top view
Pin Assignment (Top view)
Application
* This product is licensed from Silicon Storage Technology, Inc. (USA).
ORDERING INFORMATION
See detailed ordering and shipping information on page 47 of this data sheet.
©
Semiconductor Components Industries, LLC, 2015
January 2015 - Rev. 1
1
Publication Order Number :
LC88FC2HC0B/D
LC88FC2H0B
Function Details
Xstromy16 CPU
4G-byte address space
General-purpose registers : 16 bits
16 registers
Flash ROM
524288
8 bits
Programming voltage level : 2.7 to 3.6V.
Block-erasable in 2K byte units.
Data written in 2-byte units.
RAM
24576
8 bits
Minimum instruction cycle time (tCYC)
83.3 ns (12 MHz), VDD = 3.0 to 3.6V
100 ns (10 MHz), VDD = 2.7 to 3.6V
Ports
Normal withstand voltage I/O ports
Ports whose I/O direction can be designated in 1 bit units : 86 (P0n P1n, P2n, P3n, P4n, P5n, P6n, P7n, PAn
PB0 to PB6, PC2, PD0 to PD5)
Oscillation/normal withstand voltage I/O ports
: 4 (PC0, PC1, PC3, PC4)
Reset pins
: 1 (RESB)
TEST pins
: 1 (TEST)
Power pins
: 8 (VSS1 to 4, VDD1 to 4)
Timers
Timer 0 : 16-bit timer that supports PWM/toggle outputs
<1> 5-bit prescaler
<2> 8-bit PWM
2, 8-bit timer + 8-bit PWM mode selectable
<3> Clock source selectable from system clock, OSC0, OSC1, and internal RC oscillator.
Timer 1 : 16-bit timer with capture registers
<1> 5-bit prescaler
<2> May be divided into 2 channels of 8-bit timer
<3> Clock source selectable from system clock, OSC0, OSC1, and internal RC oscillator
Timer 2 : 16-bit timer with capture registers
<1> 4-bit prescaler
<2> May be divided into 2 channels of 8-bit timer
<3> Clock source selectable from system clock, OSC0, OSC1, and external events
Timer 3 : 16-bit timer that shpports PWM/toggle outputs
<1> 8-bit prescaler
<2> 8-bit timer 2ch or 8-bit timer+8-bit PWM mode selectable
<3> Clock source selectable from system clock, OSC0, OSC1, and external events
Timer 4 : 16-bit timer that supports toggle outputs
<1> Clock source selectable from system clock and prescaler 0
Timer 5 : 16-bit timer that supports toggle output
<1> Clock source selectable from system clock and prescaler 0
Timer 6 : 16-bit timer that supports toggle outputs
<1> Clock source selectable from system clock and prescaler 1
Timer 7 : 16-bit timer that supports toggle output
<1> Clock source selectable from system clock and prescaler 1
*Prescaler 0 and 1 are consisted of 4bits and can choose their clock source from OSC0 or OSC1.
Base timer
<1> Clock may be selected from OSC0 (32.768 kHz crystal oscillator) and frequency-divided output of
system clock.
<2> Interrupts can be generated in 7 timing schemes.
www.onsemi.com
2
LC88FC2H0B
Real time clock
<1> Calender with Jan. 1, 2000 to Dec.31, 2799 including automatic leapyear calculation function.
<2> Consisted of Indipendent second-minuit-hour-day-month-yeare-century counters.
Serial interfaces
SIO0 : 8-bit synchronous SIO
<1> LSB first/MSB first mode selectable
<2> Supports data communication with a data length of 8 bits or less (1 to 8 bits specifiable)
<3> Built-in 8-bit baudrate generator (4 tCYC to 512 tCYC transfer clocks)
<4> Continuous/automatic data transmission (9- to 32768-bit units specifiable)
<5> Interval function (intervals specifiable in 0 to 64tSCK units)
<6> Wakeup function
SIO1 : 8-bit synchronous SIO
<1> LSB first/MSB first mode selectable
<2> Supports data communication with a data length of 8 bits or less (1 to 8 bits specifiable)
<3> Built-in 8-bit baudrate generator (4 tCYC to 512 tCYC transfer clocks)
<4> Continuous/automatic data transmission (9- to 32768-bit units specifiable)
<5> Interval function (intervals specifiable in 0 to 64tSCK units)
<6> Wakeup function
SIO4 : 8-bit synchronous SIO
<1> LSB first/MSB first mode selectable
<2> Supports data communication with a data length of 8 bits or less (1 to 8 bits specifiable)
<3> Built-in 8-bit baudrate generator (4 tCYC to 512 tCYC transfer clocks)
<4> Continuous/automatic data transmission (9- to 32768-bit units specifiable)
<5> Interval function (intervals specifiable in 0 to 64tSCK units)
<6> Wakeup function
SMIIC0 : Single master I
2
C/8-bit synchronous SIO
Mode 0 : Single-master mode communication
Mode 1 : Synchronous 8-bit serial I/O (MSB first)
SMIIC1 : Single master I
2
C/8-bit synchronous SIO
Mode 0 : Single-master mode communication
Mode 1 : Synchronous 8-bit serial I/O (MSB first)
SLIIC0 : Slave I
2
C/8-bit synchronous SIO
Mode 0 : I
2
C slave mode communication
Mode 1 : Synchronous 8-bit serial I/O (MSB first)
Note: usable only with the external clock source
www.onsemi.com
3
LC88FC2H0B
UART0
<1> Data length : 8 bits (LSB first)
<2> Start bits
: 1 bit
<3> Stop bits
: 1 bit
<4> Parity bits : None/even parity/odd parity
<5> Transfer rate : 4/8 cycle
<6> Baudrate source clock: P07 input signal used as a 1 cycle signal (T0PWMH can be used as a clock
source) or Timer4 cycle.
<7> Full duplex communication
Note : The “cycle” refers to one period of the baudrate clock source.
UART2
<1> Data length : 8 bits (LSB first)
<2> Start bits
: 1 bit
<3> Stop bits
: 1/2 bit
<4> Parity bits : None/even parity/odd parity
<5> Transfer rate : 8 to 4096 cycle
<6> Baudrate source clock: System clock/OSC0/OSC1/P26 input signal
<7> Wakeup function
<8> Full duplex communication
Note : The “cycle” refers to one period of the baudrate clock source.
UART3
<1> Data length : 8 bits (LSB first)
<2> Start bits
: 1 bit
<3> Stop bits
: 1/2 bit
<4> Parity bits
: None/even parity/odd parity
<5> Transfer rate : 8 to 4096 cycle
<6> Baudrate source clock: System clock/OSC0/OSC1/P36 input signal
<7> Wakeup function
<8> Full duplex communication
Note : The “cycle” refers to one period of the baudrate clock source.
AD converter
<1> 12/8 bits resolution selectable
<2> Analog input: 16 channels
<3> Comparator mode
PWM
PWM0 : Multifrequency 12-bit PWM
2 channels (PWM0A and PWM0B)
<1> 2-channel pairs controlled independently of one another
<2> Clock source selectable from system clock or OSC1
<3> 8-bit prescaler: TPWMR0= (prescaler value + 1)
clock period
<4> 8-bit fundamental wave PWM generator circuit + 4-bit additional pulse generator circuit
<5> Fundamental wave PWM mode
Fundamental wave period : 16 TPWMR0 to 256 TPWMR0
High pulse width
: 0 to (Fundamental wave period - TPWMR0)
<6> Fundamental wave + additional pulse mode
Fundamental wave period : 16 TPWMR0 to 256 TPWMR0
Overall period
: Fundamental wave period
16
High pulse width
: 0 to (Fundamental wave period - TPWMR0)
CRC operating circuit
Watchdog timer
<1> Driven by the base timer + internal watchdog timer dedicated counter
<2> Interrupt or reset mode selectable
www.onsemi.com
4
LC88FC2H0B
Infrared Remote Controller Receiver Circuit
1) Noise rejection function (noise filter time constant: Approx. 120s when the 32.768kHz crystal oscillator
is selected as the reference clock source)
2) Supports data encording systems such as PPM (Pulse Position Modulation) and Manchester encording
3) X’tal HOLD mode release function
Internal Reset Function
Power-on reset (POR) function
1) POR reset is generated only at power-on time.
2) The POR release level can be selected through option configuration.
Low-voltage detection reset (LVD) function
1) LVD and POR functions are combined to generate resets when power is turned on and when power
voltage falls below a certain level.
2) The use/disuse of the LVD function and the low voltage threshold level can be selected by option
configuration.
Interrupts (peripheral function)
61 sources (33 modules), 14 vector addresses
<1> Provides three levels (low (L), high (H), and highest (X)) of multiplex interrupt control. Any interrupt
requests of the level equal to or lower than the current interrupt are not accepted.
<2> When interrupt requests to two or more vector addresses occur at the same time, the interrupt of the
highest level takes precedence over the other interrupts. For interrupts of the same level, the interrupt
into the smallest vector address takes precedence.
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Vector Address
08000H
08004H
08008H
0800CH
08014H
08018H
0801CH
08020H
08024H
0802CH
08030H
08034H
08038H
0803CH
Watchdog timer (1)
Base timer (2)
Timer 0 (2)
INT0 (1)
INT1 (1)
INT2 (1) / timer 1 (2) / UART2 (4)
INT3 (1) / timer 2 (4) / SMIIC0 (1) / SLIIC1 (1)
INT4 (1) / timer 3 (2) / Infared remote control receiver(4)
INT5 (1) / timer 4 (1) / SIO1 (2)
PWM0 (1) / SMIIC1(1)
ADC (1) / timer 5 (1) / SIO4(2)
INT6 (1) / timer 6 (1) / UART 3 (4)
INT7 (1) / SIO0 (2) / SIO0(2)
Port 0 (3) / Port 5 (8) / RTC (1) / CRC (1)
Interrupt Module
3 priority levels selectable
Of interrupts of the same level, the one with the smallest vector address takes precedence.
A number enclosed in parentheses denotes the number of sources.
Subroutine stack : RAM area
Subroutine calls that automatically save PSW, interrupt vector calls: 6 bytes
Subroutine calls that do not automatically save PSW: 4 bytes
Multiplication/division instructions
16 bits × 16 bits (4 tCYC execution time)
16 bits ÷ 16 bits (18 to 19 tCYC execution time)
32 bits ÷ 16 bits (18 to 19 tCYC execution time)
www.onsemi.com
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
