PD - 91861A
IRFL024N
HEXFET
®
Power MOSFET
l
l
l
l
l
l
Surface Mount
Advanced Process Technology
Ultra Low On-Resistance
Dynamic dv/dt Rating
Fast Switching
Fully Avalanche Rated
D
V
DSS
= 55V
R
DS(on)
= 0.075Ω
G
S
I
D
= 2.8A
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
The SOT-223 package is designed for surface-mount
using vapor phase, infra red, or wave soldering techniques.
Its unique package design allows for easy automatic pick-
and-place as with other SOT or SOIC packages but has
the added advantage of improved thermal performance
due to an enlarged tab for heatsinking. Power dissipation
of 1.0W is possible in a typical surface mount application.
S O T -2 2 3
Absolute Maximum Ratings
Parameter
I
D
@ T
A
= 25°C
I
D
@ T
A
= 25°C
I
D
@ T
A
= 70°C
I
DM
P
D
@T
A
= 25°C
P
D
@T
A
= 25°C
V
GS
E
AS
I
AR
E
AR
dv/dt
T
J,
T
STG
Continuous Drain Current, V
GS
@ 10V**
Continuous Drain Current, V
GS
@ 10V*
Continuous Drain Current, V
GS
@ 10V*
Pulsed Drain Current
Power Dissipation (PCB Mount)**
Power Dissipation (PCB Mount)*
Linear Derating Factor (PCB Mount)*
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy*
Peak Diode Recovery dv/dt
Junction and Storage Temperature Range
Max.
4.0
2.8
2.3
11.2
2.1
1.0
8.3
± 20
214
2.8
0.1
5.0
-55 to + 150
Units
A
W
W
mW/°C
V
mJ
A
mJ
V/ns
°C
Thermal Resistance
Parameter
R
θJA
R
θJA
Junction-to-Amb. (PCB Mount, steady state)*
Junction-to-Amb. (PCB Mount, steady state)**
Typ.
90
50
Max.
120
60
Units
°C/W
* When mounted on FR-4 board using minimum recommended footprint.
** When mounted on 1 inch square copper board, for comparison with other SMD devices.
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1
6/15/99
IRFL024N
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
V
(BR)DSS
∆V
(BR)DSS
/∆T
J
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min.
55
–––
–––
2.0
3.0
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.056
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
8.1
13.4
22.2
17.7
400
145
60
Max. Units
Conditions
–––
V
V
GS
= 0V, I
D
= 250µA
––– V/°C Reference to 25°C, I
D
= 1mA
0.075
Ω
V
GS
= 10V, I
D
= 2.8A
4.0
V
V
DS
= V
GS
, I
D
= 250µA
–––
S
V
DS
= 25V, I
D
= 1.68A
25
V
DS
= 55V, V
GS
= 0V
µA
250
V
DS
= 44V, V
GS
= 0V, T
J
= 125°C
100
V
GS
= 20V
nA
-100
V
GS
= -20V
18.3
I
D
= 1.68A
3.0
nC V
DS
= 44V
7.7
V
GS
= 10V, See Fig. 6 and 9
–––
V
DD
= 28V
–––
I
D
= 1.68A
ns
–––
R
G
= 24Ω
–––
R
D
= 17Ω, See Fig. 10
–––
V
GS
= 0V
–––
pF
V
DS
= 25V
–––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
MOSFET symbol
––– ––– 2.8
showing the
A
integral reverse
––– ––– 11.2
p-n junction diode.
––– ––– 1.0
V
T
J
= 25°C, I
S
=1.68A, V
GS
= 0V
––– 35
53
ns
T
J
= 25°C, I
F
= 1.68A
––– 50
75
nC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
I
SD
≤
1.68A, di/dt
≤
155A/µs, V
DD
≤
V
(BR)DSS
,
T
J
≤
150°C
Starting T
J
= 25°C, L = 54.7 mH
R
G
= 25Ω, I
AS
= 2.8A. (See Figure 12)
Pulse width
≤
300µs; duty cycle
≤
2%.
2
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IRFL024N
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
100
I
D
, Drain-to-Source Current (A)
I
D
, Drain-to-Source Current (A)
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
10
10
4.5V
1
4.5V
1
0.1
0.1
20µs PULSE WIDTH
T
J
= 25
°
C
1
10
100
0.1
0.1
20µs PULSE WIDTH
T
J
= 150
°
C
1
10
100
V
DS
, Drain-to-Source Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics,
Fig 2.
Typical Output Characteristics,
100
2.0
I
D
= 2.8A
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
I
D
, Drain-to-Source Current (A)
1.5
10
1.0
T
J
= 150
°
C
0.5
T
J
= 25
°
C
1
4.5
V DS = 25V
20µs PULSE WIDTH
5.0
5.5
6.0
6.5
0.0
-60 -40 -20
V
GS
= 10V
0
20
40
60
80 100 120 140 160
V
GS
, Gate-to-Source Voltage (V)
T
J
, Junction Temperature (
°
C)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
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3
IRFL024N
700
600
C, Capacitance (pF)
500
C
iss
C
oss
V
GS
, Gate-to-Source Voltage (V)
V
GS
= 0V,
f = 1MHz
C
iss
= C
gs
+ C
gd ,
C
ds
SHORTED
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
20
I
D
= 1.68 A
V
DS
= 44V
V
DS
= 27V
15
400
10
300
200
C
rss
5
100
0
1
10
100
0
0
5
10
FOR TEST CIRCUIT
SEE FIGURE 13
15
20
V
DS
, Drain-to-Source Voltage (V)
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
100
100
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
I
SD
, Reverse Drain Current (A)
10
I
D
, Drain Current (A)
10
100us
1ms
1
1
10ms
T
J
= 150
°
C
T
J
= 25
°
C
0.1
0.2
V
GS
= 0 V
0.4
0.6
0.8
1.0
1.2
0.1
0.1
T
C
= 25 ° C
T
J
= 150 ° C
Single Pulse
1
10
100
1000
V
SD
,Source-to-Drain Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
4
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IRFL024N
Q
G
V
DS
V
GS
R
D
10V
Q
GS
V
G
Q
GD
D.U.T.
+
R
G
-
V
DD
10V
Charge
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
Fig 9a.
Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
Fig 10a.
Switching Time Test Circuit
V
DS
50KΩ
12V
.2µF
.3µF
90%
D.U.T.
V
GS
3mA
+
V
-
DS
10%
V
GS
t
d(on)
I
G
I
D
t
r
t
d(off)
t
f
Current Sampling Resistors
Fig 9b.
Gate Charge Test Circuit
1000
Fig 10b.
Switching Time Waveforms
Thermal Response (Z
thJC
)
100
D = 0.50
0.20
0.10
10
0.05
0.02
0.01
1
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t
1
/ t
2
2. Peak T
J
= P
DM
x Z
thJC
+ T
C
0.1
1
10
100
1000
P
DM
t
1
t
2
0.1
0.0001
0.001
0.01
t
1
, Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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PCB设计
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