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MARS1G2T-LT(TSOT021G2): 产品描述MARS1G2T-LT(TSOT021G2); 产品类别电信电路; 文件大小49KB，共4页; 制造商AVAGO; 官网地址http://www.avagotech.com/

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MARS1G2T-LT(TSOT021G2)概述

MARS1G2T-LT(TSOT021G2)

MARS1G2T-LT(TSOT021G2)规格参数

参数名称	属性值
厂商名称	AVAGO
包装说明	,
Reach Compliance Code	compliant
Is Samacsys	N
Base Number Matches	1

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Product Brief

April 2003

MARS1G2 T-LT (TSOT021G2) SONET/SDH

155/622 Mbits/s Overhead and Path Processor

Features

One of the next generation system on a chip

devices of Agere Systems’ multiapplication & rate

solutions

MARS

family of framers.

Transmission convergence and SONET/SDH ter-

minal/ADM functionality for linear and ring net-

works.

Versatile IC supports 155/622 Mbits/s SONET/

SDH overhead and path processor solutions.

Low-power 1.6/3.3 V operation.

— T1.105: SONET-Basic Description including

Multiplex Structure, Rates, and Formats.

— T1.105.02 SONET-Payload Mappings.

— T1.105.03 SONET-Jitter at Network Interfaces.

— T1.105.06 SONET Physical Layer Specifica-

tions.

— T1.105.07 SONET-Sub-STS-1 Interface Rates

and Formats Specification.

— ITU-T I.432: B-ISDN User-Network Interface-

Physical Layer Specification.

— IETF RFC 2615: PPP over SONET/SDH.

— IETF RFC 1661: The Point-to-Point Protocol

(PPP).

— IETF RFC 1662: PPP in HDLC-like Framing.

SONET/SDH Interface

Interfaces

Termination of quad STS-3/STM-1 or dual STS-12/

STM-4.

Supports overhead processing for transport and

path overhead bytes.

Optional insertion and extraction of overhead bytes

via serial overhead interface.

STS pointer processing to align the receive frame

to the system frame.

STS-1 granularity cross connect between receive,

mate, STM, and data payloads.

Support for 1 + 1 and 1:1 linear networks; UPSR

and BLSR ring networks.

Full path termination and SPE extraction/insertion.

SONET/SDH compliant condition and alarm

reporting.

Handles all concatenation levels of STS-3c to

STS-24c (in multiples of 3: e.g., 3c, 6c, 9c, etc.).

Built-in diagnostic loopback modes.

Compliant with the following

Telcordia Technolo-

gies

ANSI

, and ITU standards:

— GR-253 CORE: SONET Transport Systems:

Common Generic Criteria.

— ITU-T G.707: Network Node Interface for the

Synchronous Digital Hierarchy.

— ITU-T G.803: Architecture of Transport Net-

works Based on the Synchronous Digital Hierar-

chy.

Built-in redundant STS/STM backplane interface

using 622 MHz LVDS technology.

Mate-to-mate backplane interface using 622 MHz

LVDS technology for 1 + 1, 1:1, BLSR, and UPSR

network support.

Optional 78 MHz bus (32-bit) for STS/STM inter-

face.

IEEE

1149.1 port with BIST, scan, and boundry

scan.

Microprocessor Interface

Up to 66 MHz synchronous.

16-bit address and 16-bit data interface.

Synchronous or asynchronous modes available.

Configurable to operate with most commercial

microprocessors.

MARS1G2T-LT(TSOT021G2)相似产品对比

	MARS1G2T-LT(TSOT021G2)
描述	MARS1G2T-LT(TSOT021G2)
厂商名称	AVAGO
Reach Compliance Code	compliant
Is Samacsys	N
Base Number Matches	1

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