DISCRETE SEMICONDUCTORS
DATA SHEET
BF1212; BF1212R; BF1212WR
N-channel dual-gate MOS-FETs
Product specification
2003 Nov 14
NXP Semiconductors
Product specification
N-channel dual-gate MOS-FETs
FEATURES
Short channel transistor with high forward transfer
admittance to input capacitance ratio
Low noise gain controlled amplifier
Excellent low frequency noise performance
Partly internal self-biasing circuit to ensure good
cross-modulation performance during AGC and good
DC stabilization.
APPLICATIONS
Gain controlled low noise VHF and UHF amplifiers for
5 V digital and analog television tuner applications.
DESCRIPTION
Enhancement type N-channel field-effect transistor with
source and substrate interconnected. Integrated diodes
between gates and source protect against excessive input
voltage surges. The BF1212, BF1212R and BF1212WR
are encapsulated in the SOT143B, SOT143R and
SOT343R plastic packages respectively.
1
BF1212; BF1212R;
BF1212WR
PINNING
PIN
1
2
3
4
source
drain
gate 2
gate 1
DESCRIPTION
handbook, 2 columns
4
3
2
MSB014
Top view
BF1212; marking code:
LGp
Fig.1 Simplified outline (SOT143B).
handbook, 2 columns
3
4
handbook, halfpage
3
4
2
Top view
BF1212R; marking code:
LKp
1
2
MSB035
1
MSB842
Top view
BF1212WR; marking code:
ML
Fig.2 Simplified outline (SOT143R).
Fig.3 Simplified outline (SOT343R).
QUICK REFERENCE DATA
SYMBOL
V
DS
I
D
P
tot
y
fs
C
ig1-ss
C
rss
F
X
mod
T
j
PARAMETER
drain-source voltage
drain current
total power dissipation
forward transfer admittance
input capacitance at gate 1
reverse transfer capacitance
noise figure
cross-modulation
junction temperature
2
f = 1 MHz
f = 800 MHz
input level for k = 1 % at
40 dB AGC
CONDITIONS
28
100
MIN.
33
1.7
15
1.1
104
TYP.
6
30
180
43
2.2
30
1.8
150
MAX.
UNIT
V
mA
mW
mS
pF
fF
dB
dBV
C
2003 Nov 14
NXP Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1212; BF1212R; BF1212WR
CAUTION
This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport
and handling.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
BF1212
BF1212R
BF1212WR
DESCRIPTION
plastic surface mounted package; 4 leads
plastic surface mounted package; reverse pinning; 4 leads
plastic surface mounted package; reverse pinning; 4 leads
VERSION
SOT143B
SOT143R
SOT343R
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
V
DS
I
D
I
G1
I
G2
P
tot
PARAMETER
drain-source voltage
drain current (DC)
gate 1 current
gate 2 current
total power dissipation
BF1212; BF1212R
BF1212WR
T
stg
T
j
Note
1. T
s
is the temperature of the soldering point of the source lead.
THERMAL CHARACTERISTICS
SYMBOL
R
th j-s
BF1212; BF1212R
BF1212WR
PARAMETER
thermal resistance from junction to soldering point
185
155
K/W
K/W
VALUE
UNIT
storage temperature
junction temperature
T
s
116
C;
note 1
T
s
122
C;
note 1
65
180
180
+150
150
mW
mW
C
C
CONDITIONS
MIN.
6
30
10
10
MAX.
V
mA
mA
mA
UNIT
2003 Nov 14
3
NXP Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1212; BF1212R; BF1212WR
handbook, halfpage
250
MDB828
Ptot
(mW)
200
150
(2)
(1)
100
50
0
0
50
100
150
Ts (°C)
200
(1) BF1212WR.
(2) BF1212; BF1212R.
Fig.4 Power derating curve.
STATIC CHARACTERISTICS
T
j
= 25
C
unless otherwise specified.
SYMBOL
V
(BR)DSS
PARAMETER
drain-source breakdown voltage
CONDITIONS
V
G1-S
= V
G2-S
= 0 V; I
D
= 10
A
V
G2-S
= V
DS
= 0 V; I
G1-S
= 10 mA
V
G1-S
= V
DS
= 0 V; I
G2-S
= 10 mA
V
G2-S
= V
DS
= 0 V; I
S-G1
= 10 mA
V
G1-S
= V
DS
= 0 V; I
S-G2
= 10 mA
V
G2-S
= 4 V; V
DS
= 5 V; I
D
= 100
A
V
G1-S
= 5 V; V
DS
= 5 V; I
D
= 100
A
V
G2-S
= 4 V; V
DS
= 5 V; R
G1
= 150 k;
note 1
V
G2-S
= V
DS
= 0 V; V
G1-S
= 5 V
V
G1-S
= V
DS
= 0 V; V
G2-S
= 4 V
MIN.
6
6
6
0.5
0.5
0.3
0.35
8
MAX.
10
10
1.5
1.5
1.0
1.0
16
50
20
UNIT
V
V
V
V
V
V
V
mA
nA
nA
V
(BR)G1-SS
gate 1-source breakdown voltage
V
(BR)G2-SS
gate 2-source breakdown voltage
V
(F)S-G1
V
(F)S-G2
V
G1-S(th)
V
G2-S(th)
I
DSX
I
G1-S
I
G2-S
Note
1. R
G1
connects G
1
to V
GG
= 5 V.
forward source-gate 1 voltage
forward source-gate 2 voltage
gate 1-source threshold voltage
gate 2-source threshold voltage
drain-source current
gate 1 cut-off current
gate 2 cut-off current
2003 Nov 14
4
NXP Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1212; BF1212R; BF1212WR
DYNAMIC CHARACTERISTICS
Common source; T
amb
= 25
C;
V
G2-S
= 4 V; V
DS
= 5 V; I
D
= 12 mA; unless otherwise specified.
SYMBOL
y
fs
C
ig1-ss
C
ig2-ss
C
oss
C
rss
F
PARAMETER
forward transfer admittance
input capacitance at gate 1
input capacitance at gate 2
output capacitance
noise figure
f = 1 MHz
f = 1 MHz
f = 1 MHz
f = 11 MHz; G
S
= 20 mS; B
S
= 0
f = 400 MHz; Y
S
= Y
S (opt)
f = 800 MHz; Y
S
= Y
S (opt)
G
tr
power gain
f = 200 MHz; G
S
= 2 mS; B
S
= B
S (opt)
;
G
L
= 0.5 mS; B
L
= B
L (opt)
f = 400 MHz; G
S
= 2 mS; B
S
= B
S (opt)
;
G
L
= 1 mS; B
L
= B
L (opt)
f = 800 MHz; G
S
= 3.3 mS; B
S
= B
S (opt)
;
G
L
= 1 mS; B
L
= B
L (opt)
X
mod
cross-modulation
input level for k = 1%; f
w
= 50 MHz;
f
unw
= 60 MHz; note 1
at 0 dB AGC
at 10 dB AGC
at 40 dB AGC
Note
1. Measured in test circuit Fig.21.
90
100
89
104
dBV
dBV
dBV
CONDITIONS
pulsed; T
j
= 25
C
MIN.
28
TYP.
33
1.7
1.1
0.9
15
4
0.9
1.1
35
30
25
MAX.
43
2.2
30
1.6
1.8
UNIT
mS
pF
pF
pF
fF
dB
dB
dB
dB
dB
dB
reverse transfer capacitance f = 1 MHz
2003 Nov 14
5
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