DISCRETE SEMICONDUCTORS
DATA SHEET
BF1101; BF1101R; BF1101WR
N-channel dual-gate MOS-FETs
Product specification
Supersedes data of 1999 Feb 01
1999 May 14
NXP Semiconductors
Product specification
N-channel dual-gate MOS-FETs
FEATURES
Short channel transistor with high
forward transfer admittance to input
capacitance ratio
Low noise gain controlled amplifier
up to 1 GHz
Partly internal self-biasing circuit to
ensure good cross-modulation
performance during AGC and good
DC stabilization.
APPLICATIONS
VHF and UHF applications with
3 to 7 V supply voltage, such as
television tuners and professional
communications equipment.
handbook, 2 columns
4
BF1101; BF1101R;
BF1101WR
PINNING
PIN
1
2
3
4
DESCRIPTION
source
drain
gate 2
gate 1
Top view
MSB035
handbook, 2 columns
3
4
2
1
BF1101R marking code:
NCp.
Fig.2
Simplified outline
(SOT143R).
3
, halfpage
3
4
DESCRIPTION
Enhancement type N-channel
field-effect transistor with source and
substrate interconnected. Integrated
diodes between gates and source
protect against excessive input
voltage surges. The BF1101,
BF1101R and BF1101WR are
encapsulated in the SOT143B,
SOT143R and SOT343R plastic
packages respectively.
1
Top view
2
MSB014
2
Top view
1
MSB842
BF1101 marking code:
NDp.
BF1101WR marking code:
NC.
Fig.1
Simplified outline
(SOT143B).
Fig.3
Simplified outline
(SOT343R).
QUICK REFERENCE DATA
SYMBOL
V
DS
I
D
P
tot
y
fs
C
ig1-ss
C
rss
F
X
mod
T
j
PARAMETER
drain-source voltage
drain current
total power dissipation
forward transfer admittance
input capacitance at gate 1
reverse transfer capacitance
noise figure
cross-modulation
operating junction temperature
CAUTION
This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport
and handling.
1999 May 14
2
f = 1 MHz
f = 800 MHz
input level for k = 1% at
40 dB AGC
CONDITIONS
25
100
MIN.
30
2.2
25
1.7
TYP.
7
30
200
2.7
35
2.5
150
MAX.
UNIT
V
mA
mW
mS
pF
fF
dB
dBV
C
NXP Semiconductors
Product specification
N-channel dual-gate MOS-FETs
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
V
DS
I
D
I
G1
I
G2
P
tot
T
stg
T
j
Note
1. T
s
is the temperature of the soldering point of the source lead.
THERMAL CHARACTERISTICS
SYMBOL
R
th j-s
PARAMETER
thermal resistance from junction to soldering point
PARAMETER
drain-source voltage
drain current
gate 1 current
gate 2 current
total power dissipation
storage temperature
operating junction temperature
T
s
110
C;
note 1
BF1101; BF1101R; BF1101WR
CONDITIONS
MIN.
7
MAX.
V
30
10
10
200
+150
+150
UNIT
mA
mA
mA
mW
C
C
65
VALUE
200
UNIT
K/W
MGL615
handbook, halfpage
250
Ptot
(mW)
200
150
100
50
0
0
50
100
150
Ts (°C)
200
Fig.4 Power derating curve.
1999 May 14
3
NXP Semiconductors
Product specification
N-channel dual-gate MOS-FETs
STATIC CHARACTERISTICS
T
j
= 25
C
unless otherwise specified.
SYMBOL
V
(BR)DSS
PARAMETER
drain-source breakdown voltage
BF1101; BF1101R; BF1101WR
CONDITIONS
V
G1-S
= V
G2-S
= 0; I
D
= 10
A
V
G2-S
= V
DS
= 0; I
G1-S
= 10 mA
V
G1-S
= V
DS
= 0; I
G2-S
= 10 mA
V
G2-S
= V
DS
= 0; I
S-G1
= 10 mA
V
G1-S
= V
DS
= 0; I
S-G2
= 10 mA
V
G2-S
= 4 V; V
DS
= 5 V; I
D
= 100
A
V
G1-S
= 5 V; V
DS
= 5 V; I
D
= 100
A
V
G2-S
= 4 V; V
DS
= 5 V; R
G1
= 120 k;
note 1
V
G2-S
= V
DS
= 0; V
G1-S
= 5 V
V
G1-S
= V
DS
= 0; V
G2-S
= 4 V
MIN.
7
7
7
0.5
0.5
0.3
0.3
8
MAX.
16
16
1.5
1.5
1.0
1.2
16
50
20
UNIT
V
V
V
V
V
V
V
mA
nA
nA
V
(BR)G1-SS
gate 1-source breakdown voltage
V
(BR)G2-SS
gate 2-source breakdown voltage
V
(F)S-G1
V
(F)S-G2
V
G1-S (th)
V
G2-S (th)
I
DSX
I
G1-SS
I
G2-SS
Note
1. R
G1
connects G
1
to V
GG
= 5 V; see Fig.21.
forward source-gate 1 voltage
forward source-gate 2 voltage
gate 1-source threshold voltage
gate 2-source threshold voltage
drain-source current
gate 1 cut-off current
gate 2 cut-off current
DYNAMIC CHARACTERISTICS
Common source; T
amb
= 25
C;
V
G2-S
= 4 V; V
DS
= 5 V; I
D
= 12 mA; unless otherwise specified.
SYMBOL
y
fs
C
ig1-ss
C
ig2-ss
C
oss
C
rss
F
X
mod
PARAMETER
forward transfer admittance
input capacitance at gate 1
input capacitance at gate 2
output capacitance
noise figure
cross-modulation
f = 1 MHz
f = 1 MHz
f = 1 MHz
f = 800 MHz; Y
S
= Y
S opt
input level for k = 1% at 0 dB AGC;
f
w
= 50 MHz; f
unw
= 60 MHz; note 1
input level for k = 1% at 40 dB AGC;
f
w
= 50 MHz; f
unw
= 60 MHz; note 1
Note
1. Measured in test circuit of Fig.21.
CONDITIONS
pulsed; T
j
= 25
C
MIN.
25
85
100
TYP.
30
2.2
1.6
1.2
25
1.7
MAX.
40
2.7
35
2.5
UNIT
mS
pF
pF
pF
fF
dB
dBV
dBV
reverse transfer capacitance f = 1 MHz
1999 May 14
4
NXP Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1101; BF1101R; BF1101WR
MGS299
MGS300
handbook, halfpage
20
ID
(mA)
16
VG2-S = 4 V
3.5 V
3V
handbook, halfpage
20
ID
(mA)
16
VG1-S = 1.6 V
2.5 V
1.5 V
12
2V
8
12
1.4 V
8
1.3 V
1.2 V
4
1.5 V
4
1.1 V
1V
1V
0
0
0.4
0.8
1.2
1.6
VG1-S (V)
2
0
0
2
4
6
VDS (V)
8
V
DS
= 5 V.
T
j
= 25
C.
V
G2-S
= 4 V.
T
j
= 25
C.
Fig.5 Transfer characteristics; typical values.
Fig.6 Output characteristics; typical values.
MGS301
handbook, halfpage
100
I G1
(μA)
80
VG2-S = 4 V 3.5 V
3V
handbook, halfpage
40
MGS302
y fs
(mS)
30
VG2-S = 4 V
3.5 V
3V
60
2.5 V
40
2V
20
20
2.5 V
10
0
0
0.5
1
1.5
2
VG1-S (V)
2.5
0
0
4
8
12
2V
16
20
I D (mA)
V
DS
= 5 V.
T
j
= 25
C.
V
DS
= 5 V.
T
j
= 25
C.
Fig.7
Gate 1 current as a function of gate 1
voltage; typical values.
Fig.8
Forward transfer admittance as a
function of drain current; typical values.
1999 May 14
5
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