HIP6019B
NOT RECOMMENDED FOR NEW DESIGNS
NO RECOMMENDED REPLACEMENT
contact our Technical Support Center at
1-888-INTERSIL or www.intersil.com/tsc
DATASHEET
FN4587
Rev 1.00
April 13, 2005
Advanced Dual PWM and Dual Linear Power Control
The HIP6019B provides the power control and protection for
four output voltages in high-performance microprocessor and
computer applications. The IC integrates two PWM
controllers, a linear regulator and a linear controller as well as
the monitoring and protection functions into a single 28 lead
SOIC package. One PWM controller regulates the
microprocessor core voltage with a synchronous-rectified
buck converter, while the second PWM controller supplies the
computer’s 3.3V power with a standard buck converter. The
linear controller regulates power for the GTL bus and the
linear regulator provides power for the clock driver circuits.
The HIP6019B includes an Intel-compatible, TTL 5-input
digital-to-analog converter (DAC) that adjusts the core PWM
output voltage from 2.1VDC to 3.5VDC in 0.1V increments
and from 1.3VDC to 2.05VDC in 0.05V steps. The precision
reference and voltage-mode control provide ±1% static
regulation. The second PWM controller is user-adjustable for
output levels between 3.0V and 3.5V with
2%
accuracy. The
adjustable linear regulator uses an internal pass device to
provide 2.5V
2.5%.
The adjustable linear controller drives an
external N-Channel MOSFET to provide 1.5V
2.5%.
The HIP6019B monitors all the output voltages. A single
Power Good signal is issued when the core is within ±10% of
the DAC setting and the other levels are above their under-
voltage levels. Additional built-in over-voltage protection for
the core output uses the lower MOSFET to prevent output
voltages above 115% of the DAC setting. The PWM
controller’s over-current functions monitor the output current
by sensing the voltage drop across the upper MOSFET’s
r
DS(ON)
, eliminating the need for a current sensing resistor.
Features
• Provides 4 Regulated Voltages
- Microprocessor Core, I/O, Clock Chip and GTL Bus
• Drives N-Channel MOSFETs
• Operates from +5V and +12V Inputs
• Simple Single-Loop Control Designs
- Voltage-Mode PWM Control
• Fast Transient Response
- High-Bandwidth Error Amplifiers
- Full 0% to 100% Duty Ratios
• Excellent Output Voltage Regulation
- Core PWM Output:
1%
Over Temperature
- I/O PWM Output:
2%
Over Temperature
- Other Outputs:
2.5%
Over Temperature
• TTL-Compatible 5-Bit Digital-to-Analog Core Output
Voltage Selection
- Wide Range . . . . . . . . . . . . . . . . . . . 1.3V
DC
to 3.5V
DC
- 0.1V Steps . . . . . . . . . . . . . . . . . . . . 2.1V
DC
to 3.5V
DC
- 0.05V Steps . . . . . . . . . . . . . . . . . . 1.3V
DC
to 2.05V
DC
• Power-Good Output Voltage Monitor
• Microprocessor Core Voltage Protection Against Shorted
MOSFET
• Over-Voltage and Over-Current Fault Monitors
- Does Not Require Extra Current Sensing Element,
Uses MOSFET’s r
DS(ON)
• Small Converter Size
- Constant Frequency Operation
- 200kHz Free-Running Oscillator; Programmable from
50kHz to 1MHz
•
Pb-Free Available (RoHS Compliant)
Pinout
HIP6019B
(SOIC)
TOP VIEW
UGATE2 1
PHASE2 2
VID4 3
VID3 4
VID2 5
VID1 6
VID0 7
PGOOD 8
OCSET2 9
FB2 10
COMP2 11
SS 12
FAULT/RT 13
FB4 14
28 VCC
27 UGATE1
26 PHASE1
25 LGATE1
24 PGND
23 OCSET1
22 VSEN1
21 FB1
20 COMP1
19 FB3
18 GATE3
17 GND
16 VOUT4
15 VSEN2
Applications
• Full Motherboard Power Regulation for Computers
• Low-Voltage Distributed Power Supplies
Ordering Information
PART NUMBER
HIP6019BCB
HIP6019BCBZ
(See Note)
TEMP. (
o
C)
0 to 70
0 to 70
PACKAGE
28 Ld SOIC
28 Ld SOIC
(Pb-free)
PKG. DWG. #
M28.3
M28.3
Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding
compounds/die attach materials and 100% matte tin plate termination finish, which are
RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
FN4587 Rev 1.00
April 13, 2005
Page 1 of 15
HIP6019B
Absolute Maximum Ratings
Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+15V
PGOOD, RT/FAULT, and GATE Voltage . . GND - 0.3V to V
CC
+ 0.3V
Input, Output or I/O Voltage . . . . . . . . . . . . . . . . . . GND -0.3V to 7V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Thermal Information
Thermal Resistance (Typical, Note 1)
JA
(
o
C/W)
Operating Conditions
Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . +12V
10%
Ambient Temperature Range. . . . . . . . . . . . . . . . . . . . . 0
o
C to 70
o
C
Junction Temperature Range . . . . . . . . . . . . . . . . . . . 0
o
C to 125
o
C
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .
60
50
SOIC Package (with 3 in
2
of copper) . . . . . . . . . . .
Maximum Junction Temperature (Plastic Package) . . . . . . . .150
o
C
Maximum Storage Temperature Range . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300
o
C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER
VCC SUPPLY CURRENT
Nominal Supply
POWER-ON RESET
Rising VCC Threshold
Falling VCC Threshold
Rising V
OCSET1
Threshold
OSCILLATOR
Free Running Frequency
Total Variation
Ramp Amplitude
REFERENCE AND DAC
Recommended Operating Conditions, Unless Otherwise Noted.
Refer to Figures 1, 2 and 3
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
I
CC
UGATE1, GATE2, GATE3, LGATE1, and
VOUT4 Open
-
10
-
mA
V
OCSET
= 4.5V
V
OCSET
= 4.5V
8.6
8.2
-
-
-
1.25
10.4
10.2
-
V
V
V
RT = OPEN
6k < RT to GND < 200k
V
OSC
RT = Open
185
-15
-
200
-
1.9
215
+15
-
kHz
%
V
P-P
DAC(VID0-VID4) Input Low Voltage
DAC(VID0-VID4) Input High Voltage
DACOUT Voltage Accuracy
Reference Voltage
(Pin FB2, FB3, and FB4)
LINEAR REGULATOR
Regulation
Under-Voltage Level
Under-Voltage Hysteresis
Over-Current Protection
Over-Current Protection During Start-Up
LINEAR CONTROLLER
Regulation
Under-Voltage Level
Under-Voltage Hysteresis
FB3
UV
VSEN3 = GATE3
FB3 Rising
C
SS
Voltage < 4V
FB4
UV
10mA < I
VOUT4
< 150mA
FB4 Rising
-
2.0
-1.0
1.240
-
-
-
1.265
0.8
-
+1.0
1.290
V
V
%
V
-2.5
-
-
180
560
-
75
6
230
700
2.5
87
-
-
-
%
%
%
mA
mA
-2.5
-
-
-
75
6
2.5
87
-
%
%
%
FN4587 Rev 1.00
April 13, 2005
Page 4 of 15
TI技术论坛
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
