MX29GL256F
MX29GL256F
DATASHEET
P/N:PM1544
REV. 1.5, OCT. 30, 2013
1
MX29GL256F
Contents
FEATURES ............................................................................................................................................................. 5
GENERAL FEATURES .................................................................................................................................. 5
PERFORMANCE ........................................................................................................................................... 5
SOFTWARE FEATURES............................................................................................................................... 5
HARDWARE FEATURES .............................................................................................................................. 5
PIN CONFIGURATION ........................................................................................................................................... 6
PIN DESCRIPTION ................................................................................................................................................. 7
BLOCK DIAGRAM.................................................................................................................................................. 8
BLOCK DIAGRAM DESCRIPTION ........................................................................................................................ 9
BLOCK STRUCTURE........................................................................................................................................... 10
Table 1. MX29GL256F SECTOR ARCHITECTURE ................................................................................... 10
BUS OPERATION ................................................................................................................................................. 11
Table 2-1. BUS OPERATION ....................................................................................................................... 11
Table 2-2. BUS OPERATION ....................................................................................................................... 12
FUNCTIONAL OPERATION DESCRIPTION ....................................................................................................... 13
READ OPERATION ..................................................................................................................................... 13
PAGE READ ................................................................................................................................................ 13
WRITE OPERATION ................................................................................................................................... 13
DEVICE RESET .......................................................................................................................................... 13
STANDBY MODE ........................................................................................................................................ 13
OUTPUT DISABLE ...................................................................................................................................... 14
BYTE/WORD SELECTION.......................................................................................................................... 14
HARDWARE WRITE PROTECT ................................................................................................................. 14
ACCELERATED PROGRAMMING OPERATION ....................................................................................... 14
WRITE BUFFER PROGRAMMING OPERATION ....................................................................................... 14
SECTOR PROTECT OPERATION .............................................................................................................. 15
AUTOMATIC SELECT BUS OPERATIONS ................................................................................................ 15
SECTOR LOCK STATUS VERIFICATION .................................................................................................. 15
READ SILICON ID MANUFACTURER CODE ............................................................................................ 16
READ INDICATOR BIT (Q7) FOR SECURITY SECTOR ............................................................................ 16
INHERENT DATA PROTECTION ................................................................................................................ 16
COMMAND COMPLETION ......................................................................................................................... 16
LOW VCC WRITE INHIBIT.......................................................................................................................... 16
WRITE PULSE "GLITCH" PROTECTION ................................................................................................... 16
LOGICAL INHIBIT........................................................................................................................................ 16
POWER-UP SEQUENCE ............................................................................................................................ 17
POWER-UP WRITE INHIBIT ....................................................................................................................... 17
POWER SUPPLY DECOUPLING................................................................................................................ 17
P/N:PM1544
REV. 1.5, OCT. 30, 2013
2
MX29GL256F
COMMAND OPERATIONS ................................................................................................................................... 18
READING THE MEMORY ARRAY .............................................................................................................. 18
AUTOMATIC PROGRAMMING OF THE MEMORY ARRAY ...................................................................... 18
ERASING THE MEMORY ARRAY............................................................................................................... 19
SECTOR ERASE ......................................................................................................................................... 19
CHIP ERASE .............................................................................................................................................. 20
ERASE SUSPEND/RESUME ...................................................................................................................... 21
SECTOR ERASE RESUME ........................................................................................................................ 21
PROGRAM SUSPEND/RESUME ............................................................................................................... 22
PROGRAM RESUME .................................................................................................................................. 22
BUFFER WRITE ABORT ............................................................................................................................. 22
AUTOMATIC SELECT OPERATIONS ......................................................................................................... 23
AUTOMATIC SELECT COMMAND SEQUENCE ........................................................................................ 23
READ MANUFACTURER ID OR DEVICE ID .............................................................................................. 24
RESET ........................................................................................................................................................ 24
ADVANCED SECTOR PROTECTION/UN-PROTECTION.......................................................................... 25
Figure 1. Advance Sector Protection/Unprotection SPB Program Algorithm ............................................... 25
Figure 2. Lock Register Program Algorithm ................................................................................................. 26
Figure 3. SPB Program Algorithm................................................................................................................ 28
SECURITY SECTOR FLASH MEMORY REGION ...................................................................................... 31
TABLE 3. COMMAND DEFINITIONS .......................................................................................................... 32
COMMON FLASH MEMORY INTERFACE (CFI) MODE ..................................................................................... 35
QUERY COMMAND AND COMMAND FLASH MEMORY INTERFACE (CFI) MODE ................................ 35
Table 4-1. CFI mode: Identification Data Values
(Note 1)
................................................................................ 35
Table 4-2. CFI mode: System Interface Data Values ................................................................................... 35
Table 4-3. CFI mode: Device Geometry Data Values .................................................................................. 36
Table 4-4. CFI mode: Primary Vendor-Specific Extended Query Data Values
............................................ 37
ELECTRICAL CHARACTERISTICS .................................................................................................................... 38
ABSOLUTE MAXIMUM STRESS RATINGS ............................................................................................... 38
OPERATING TEMPERATURE AND VOLTAGE .......................................................................................... 38
Maximum Negative Overshoot Waveform
................................................................................................... 38
Maximum Positive Overshoot Waveform
..................................................................................................... 38
DC CHARACTERISTICS............................................................................................................................. 39
SWITCHING TEST CIRCUITS .................................................................................................................... 40
Test Condition ............................................................................................................................................. 40
SWITCHING TEST WAVEFORMS ............................................................................................................. 40
AC CHARACTERISTICS ............................................................................................................................. 41
WRITE COMMAND OPERATION......................................................................................................................... 43
Figure 4. COMMAND WRITE OPERATION ................................................................................................ 43
READ/RESET OPERATION ................................................................................................................................. 44
Figure 5. READ TIMING WAVEFORMS ...................................................................................................... 44
Figure 6. RESET# TIMING WAVEFORM ................................................................................................... 45
P/N:PM1544
REV. 1.5, OCT. 30, 2013
3
MX29GL256F
ERASE/PROGRAM OPERATION ........................................................................................................................ 46
Figure 7. AUTOMATIC CHIP ERASE TIMING WAVEFORM ....................................................................... 46
Figure 8. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART ............................................................ 47
Figure 9. AUTOMATIC SECTOR ERASE TIMING WAVEFORM ................................................................ 48
Figure 10. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART .................................................... 49
Figure 11. ERASE SUSPEND/RESUME FLOWCHART ............................................................................. 50
Figure 12. AUTOMATIC PROGRAM TIMING WAVEFORMS...................................................................... 51
Figure 13. ACCELERATED PROGRAM TIMING DIAGRAM....................................................................... 51
Figure 14. CE# CONTROLLED WRITE TIMING WAVEFORM ................................................................... 52
Figure 15. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART .................................................... 53
Figure 16. SILICON ID READ TIMING WAVEFORM .................................................................................. 54
WRITE OPERATION STATUS .............................................................................................................................. 55
Figure 17. DATA# POLLING TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS) .................. 55
Figure 18. STATUS POLLING FOR WORD PROGRAM/ERASE................................................................ 56
Figure 19. STATUS POLLING FOR WRITE BUFFER PROGRAM ............................................................. 57
Figure 20. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS)........................ 58
Figure 21. TOGGLE BIT ALGORITHM ........................................................................................................ 59
Figure 22. BYTE# TIMING WAVEFORM FOR READ OPERATIONS (BYTE# switching from byte mode to
word mode) ................................................................................................................................................. 60
Figure 23. PAGE READ TIMING WAVEFORM............................................................................................ 61
Figure 24. DEEP POWER DOWN MODE WAVEFORM ............................................................................ 62
Figure 25. WRITE BUFFER PROGRAM FLOWCHART ............................................................................. 63
RECOMMENDED OPERATING CONDITIONS .................................................................................................... 64
At Device Power-Up .................................................................................................................................... 64
ERASE AND PROGRAMMING PERFORMANCE ............................................................................................... 65
DATA RETENTION ............................................................................................................................................... 65
LATCH-UP CHARACTERISTICS ......................................................................................................................... 65
PIN CAPACITANCE .............................................................................................................................................. 65
ORDERING INFORMATION ................................................................................................................................. 66
PART NAME DESCRIPTION ................................................................................................................................ 67
PACKAGE INFORMATION ................................................................................................................................... 68
REVISION HISTORY ............................................................................................................................................ 71
P/N:PM1544
REV. 1.5, OCT. 30, 2013
4
MX29GL256F
SINGLE VOLTAGE 3V ONLY FLASH MEMORY
FEATURES
GENERAL FEATURES
• Power Supply Operation
- 2.7 to 3.6 volt for read, erase, and program operations
- MX29GL256F H/L: VI/O=VCC=2.7V~3.6V, VI/O voltage must tight with VCC
- MX29GL256F U/D: VI/O=1.65V~3.6V for Input/Output
• Byte/Word mode switchable
- 33,554,432 x 8 / 16,777,216 x 16
• 64KW/128KB uniform sector architecture
- 256 equal sectors
• 16-byte/8-word page read buffer
• 64-byte/32-word write buffer
• Extra 128-word sector for security
- Features factory locked and identifiable, and customer lockable
• Advanced sector protection function (Solid and Password Protect)
• Latch-up protected to 100mA from -1V to 1.5xVcc
• Low Vcc write inhibit : Vcc ≤ VLKO
• Compatible with JEDEC standard
- Pinout and software compatible to single power supply Flash
• Deep power down mode
PERFORMANCE
• High Performance
- Fast access time:
- MX29GL256F H/L: 100ns (VCC=2.7~3.6V), 90ns (VCC=3.0~3.6V)
- MX29GL256F U/D: 110ns (VCC=2.7~3.6V, V I/O=1.65 to Vcc)
- Page access time:
- MX29GL256F H/L: 25ns
- MX29GL256F U/D: 30ns
- Fast program time: 10us/word
- Fast erase time: 0.5s/sector
• Low Power Consumption
- Low active read current: 10mA (typical) at 5MHz
- Low standby current: 20uA (typical)
•
Minimum 100,000 erase/program cycle
• 20 years data retention
SOFTWARE FEATURES
• Program/Erase Suspend & Program/Erase Resume
- Suspends sector erase operation to read data from or program data to another sector which is not being
erased
- Suspends sector program operation to read data from another sector which is not being program
• Status Reply
- Data# Polling & Toggle bits provide detection of program and erase operation completion
• Support Common Flash Interface (CFI)
HARDWARE FEATURES
• Ready/Busy# (RY/BY#) Output
- Provides a hardware method of detecting program and erase operation completion
• Hardware Reset (RESET#) Input
- Provides a hardware method to reset the internal state machine to read mode
• WP#/ACC input pin
- Hardware write protect pin/Provides accelerated program capability
PACKAGE
• 56-Pin TSOP
• 56-Ball FBGA (7mm x 9mm)
• 64-Ball LFBGA (11mm x 13mm)
•
All devices are RoHS Compliant and Halogen-free
P/N:PM1544
REV. 1.5, OCT. 30, 2013
5