SiHB33N60E
www.vishay.com
Vishay Siliconix
E Series Power MOSFET
PRODUCT SUMMARY
V
DS
(V) at T
J
max.
R
DS(on)
max. () at 25 °C
Q
g
max. (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
V
GS
= 10 V
150
24
42
Single
D
FEATURES
650
0.099
•
•
•
•
•
•
Low figure-of-merit (FOM): R
on
x Q
g
Low input capacitance (C
iss
)
Reduced switching and conduction losses
Ultra low gate charge (Q
g
)
Available
Avalanche energy rated (UIS)
Material categorization: for definitions of
compliance please see
www.vishay.com/doc?99912
D
2
PAK (TO-263)
APPLICATIONS
•
•
•
•
Server and telecom power supplies
Switch mode power supplies (SMPS)
Power factor correction power supplies (PFC)
Lighting
- High-intensity discharge (HID)
- Fluorescent ballast lighting
• Industrial
- Welding
- Induction heating
- Motor drives
- Battery chargers
- Renewable energy
- Solar (PV inverters)
G
G D
S
S
N-Channel MOSFET
ORDERING INFORMATION
Package
Lead (Pb)-free
Lead (Pb)-free and Halogen-free
D
2
PAK (TO-263)
SiHB33N60E-E3
SiHB33N60E-GE3
SiHB33N60ET5-GE3
SiHB33N60ET1-GE3
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (T
J
= 150 °C)
Pulsed Drain Current
a
Linear Derating Factor
Single Pulse Avalanche Energy
b
Maximum Power Dissipation
Operating Junction and Storage Temperature Range
Drain-Source Voltage Slope
Reverse Diode dV/dt
d
Soldering Recommendations (Peak temperature)
c
for 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature.
b. V
DD
= 50 V, starting T
J
= 25 °C, L = 28.2 mH, R
g
= 25
,
I
AS
= 7.5 A.
c. 1.6 mm from case.
d. I
SD
I
D
, dI/dt = 100 A/μs, starting T
J
= 25 °C.
V
DS
= 0 V to 80 % V
DS
E
AS
P
D
T
J
, T
stg
dV/dt
V
GS
at 10 V
T
C
= 25 °C
T
C
= 100 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
LIMIT
600
± 30
33
21
88
2.2
793
278
-55 to +150
70
12
300
W/°C
mJ
W
°C
V/ns
°C
A
UNIT
V
S16-0799-Rev. H, 02-May-16
Document Number: 91524
1
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiHB33N60E
www.vishay.com
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
Maximum Junction-to-Case (Drain)
SYMBOL
R
thJA
R
thJC
TYP.
-
-
MAX.
62
0.45
UNIT
°C/W
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage (N)
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance, Energy
Related
b
Effective Output Capacitance, Time
Related
c
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Gate Input Resistance
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward Current
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
SYMBOL
V
DS
V
DS
/T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
C
o(er)
TEST CONDITIONS
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
V
GS
= ± 20 V
V
GS
= ± 30 V
V
DS
= 600 V, V
GS
= 0 V
V
DS
= 480 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 16.5 A
V
DS
= 30 V, I
D
= 16.5 A
V
GS
= 0 V,
V
DS
= 100 V,
f = 1 MHz
MIN.
600
-
2.0
-
-
-
-
-
-
-
-
-
-
TYP.
-
0.71
-
-
-
-
-
0.083
11
3508
156
6
136
468
100
24
42
28
60
99
54
0.7
MAX.
-
-
4.0
± 100
±1
1
10
0.099
-
-
-
-
UNIT
V
V/°C
V
nA
μA
μA
S
a
pF
-
-
150
-
-
56
90
150
80
1.0
ns
nC
V
GS
= 0 V, V
DS
= 0 V to 480 V
C
o(tr)
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
R
g
f = 1 MHz, open drain
V
DD
= 480 V, I
D
= 16.5 A
R
g
= 9.1
,
V
GS
= 10 V
V
GS
= 10 V
I
D
= 16.5 A, V
DS
= 480 V
-
-
-
-
-
-
-
-
0.2
-
-
-
-
-
-
-
-
0.9
503
8.5
26
33
A
88
1.2
1006
17
-
V
ns
μC
A
G
S
T
J
= 25 °C, I
S
= 16.5 A, V
GS
= 0 V
T
J
= 25 °C, I
F
= I
S
,
dI/dt = 100 A/μs, V
R
= 20 V
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature.
b. C
oss(er)
is a fixed capacitance that gives the same energy as C
oss
while V
DS
is rising from 0 % to 80 % V
DSS
.
c. C
oss(tr)
is a fixed capacitance that gives the charging time as C
oss
while V
DS
is rising from 0 % to 80 % V
DSS
.
S16-0799-Rev. H, 02-May-16
Document Number: 91524
2
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiHB33N60E
www.vishay.com
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
120
TOP
15 V
14 V
13 V
12 V
11 V
10 V
9.0 V
8.0 V
7.0 V
BOTTOM 6.0 V
Vishay Siliconix
3.0
T
J
= 25 °C
I
D
= 16.5 A
2.5
R
DS(on)
- On-Resistance
(Normalized)
100
I
D
- Drain Current (A)
80
2.0
60
1.5
40
1.0
20
5.0 V
0.5
V
GS
= 10 V
0.0
0
5
10
15
20
25
V
DS
- Drain-to-Source Voltage (V)
30
- 60 - 40 - 20
0
20
40
60
80 100 120 140 160
T
J
- Junction Temperature (°C)
0
Fig. 1 - Typical Output Characteristics
70
TOP
Fig. 4 - Normalized On-Resistance vs. Temperature
100 000
60
I
D
- Drain Current (A)
50
40
30
20
C - Capacitance (pF)
15 V
14 V
13 V
12 V
11 V
10 V
9.0 V
8.0 V
7.0 V
BOTTOM 6.0 V
T
J
= 150 °C
10 000
C
iss
V
GS
= 0 V, f = 1 MHz
C
iss
= C
gs
+ C
gd
x C
ds
shorted
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
1000
C
oss
100
10
10
5.0 V
C
rss
1
30
0
0
5
10
15
20
25
V
DS
- Drain-to-Source Voltage (V)
0
100
200
300
400
500
600
V
DS
- Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
120
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
25
5000
20
100
I
D
, Drain-to-Source Current (A)
80
15
C
oss
(pF)
C
oss
500
E
oss
10
E
oss
(μJ)
60
40
TJ = 150 °C
20
TJ = 25 °C
5
0
0
5
10
15
20
25
V
GS,
Gate-to-Source
Voltage (V)
50
0
100
200
300
V
DS
400
500
600
0
Fig. 3 - Typical Transfer Characteristics
Fig. 6 - C
OSS
and E
OSS
vs. V
DS
S16-0799-Rev. H, 02-May-16
Document Number: 91524
3
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiHB33N60E
www.vishay.com
Vishay Siliconix
35
24
V
DS
= 300 V
V
GS
-
Gate-to-Source
Voltage (V)
20
30
V
DS
= 120 V
16
I
D
, Drain Current (A)
25
20
15
10
V
DS
= 480 V
12
8
4
5
0
25
50
75
100
125
150
T
C
- Temperature (°C)
0
0
40
80
120
160
200
Q
g
- Total
Gate
Charge (nC)
Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage
1000
Fig. 10 - Maximum Drain Current vs. Case Temperature
750
V
DS
, Drain -to -Source Breakdown
Voltage (V)
725
700
675
650
625
600
575
-60 -40 -20
100
I
S
-
Source
Current (A)
T
J
= 150 °C
10
T
J
= 25
°C
1
0.1
V
GS
= 0 V
0.0
0.2
0.4
0.6
0.8
1.0
1.2
V
SD
-
Source-to-Drain
Voltage (V)
1.4
1.6
0.01
0
20
40
60
80 100 120 140
160
T
J
,Temperature (°C)
Fig. 8 - Typical Source-Drain Diode Forward Voltage
1000
Operation in this area limited
by R
DS(on)
*
100
I
D
, Drain Current (A)
Fig. 11 - Typical Drain-to-Source Voltage vs. Temperature
I
DM
Limited
10
Limited by R
D (on)
*
100 µs
1 ms
1
T
C
= 25
°C
T
J
= 150
°C
Single Pulse
0.1
1
10 ms
BVDSS Limited
10
100
1000
V
DS
- Drain-to-Source Voltage (V)
* V
GS
> minimum V
GS
at which R
DS(on)
is
specified
Fig. 9 - Maximum Safe Operating Area
S16-0799-Rev. H, 02-May-16
Document Number: 91524
4
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiHB33N60E
www.vishay.com
Vishay Siliconix
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single
Pulse
0.01
0.0001
0.001
0.01
Square
Wave Pulse Duration (s)
0.1
1
Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case
R
D
V
DS
V
GS
R
G
V
DS
t
p
V
DD
+
-
V
DD
D.U.T.
V
DS
10 V
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
I
AS
Fig. 16 - Unclamped Inductive Waveforms
Fig. 13 - Switching Time Test Circuit
V
DS
90 %
10 V
Q
GS
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
Q
G
Q
GD
V
G
Charge
Fig. 14 - Switching Time Waveforms
Fig. 17 - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
50 kΩ
12 V
L
Vary t
p
to obtain
required I
AS
R
G
V
DS
0.2 µF
0.3 µF
D.U.T
I
AS
+
-
+
V
DD
V
GS
D.U.T.
-
V
DS
10 V
t
p
0.01
Ω
3 mA
I
G
I
D
Current sampling resistors
Fig. 15 - Unclamped Inductive Test Circuit
S16-0799-Rev. H, 02-May-16
Fig. 18 - Gate Charge Test Circuit
Document Number: 91524
5
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
stm32/stm8
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
