Datasheet> 器件分类 > 逻辑> MK9173-15CS08LF

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MK9173-15CS08LF: 产品描述PLL Based Clock Driver, 9173 Series, 2 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, SOIC-8; 产品类别逻辑; 文件大小255KB，共9页; 制造商IDT (Integrated Device Technology); 标准

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MK9173-15CS08LF概述

PLL Based Clock Driver, 9173 Series, 2 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, SOIC-8

MK9173-15CS08LF规格参数

参数名称	属性值
是否Rohs认证	符合
厂商名称	IDT (Integrated Device Technology)
零件包装代码	SOIC
包装说明	SOIC-8
针数	8
Reach Compliance Code	unknown
Is Samacsys	N
系列	9173
输入调节	STANDARD
JESD-30 代码	R-PDSO-G8
JESD-609代码	e3
长度	4.9 mm
逻辑集成电路类型	PLL BASED CLOCK DRIVER
功能数量	1
反相输出次数
端子数量	8
实输出次数	2
最高工作温度	70 °C
最低工作温度
输出特性	3-STATE
封装主体材料	PLASTIC/EPOXY
封装代码	SOP
封装形状	RECTANGULAR
封装形式	SMALL OUTLINE
峰值回流温度（摄氏度）	NOT SPECIFIED
认证状态	Not Qualified
座面最大高度	1.75 mm
最大供电电压 (Vsup)	5.25 V
最小供电电压 (Vsup)	4.75 V
标称供电电压 (Vsup)	5 V
表面贴装	YES
技术	CMOS
温度等级	COMMERCIAL
端子面层	MATTE TIN
端子形式	GULL WING
端子节距	1.27 mm
端子位置	DUAL
处于峰值回流温度下的最长时间	NOT SPECIFIED
宽度	3.9 mm
最小 fmax	37.5 MHz
Base Number Matches	1

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DATASHEET

VIDEO GENLOCK PLL

Description

The MK9173-01/-15 provide the analog PLL circuit blocks

to implement a frequency multiplier. Because the device is

configured to use an external divider in the PLL clock

feedback path, a large divider can be used to result in a

large frequency multiplication ratio. This is useful when

using a low frequency input clock to generate a high

frequency output clock. The MK9173-01/-15 contains a

phase detector, charge pump, loop filter, and

voltage-controlled oscillator (VCO). The ICS674-01 can be

used as the external feedback divider.

A common application of the MK9173-01/-15 is the

implementation of a video genlock circuit. Because of this,

the MK9173-01/-15 inputs operate on the negative-going

clock edge.

The MK9173-01/-15 is pin and function compatible to the

AV9173-01/15.

MK9173-01/-15

Features

•

Phase-detector/VCO circuit block

•

Ideal for genlock system

•

Reference clock range 12 kHz to 1 MHz for full output

clock range

•

Output clock range of 1.25 to 75 MHz (-01), and 0.625 to

37.5 MHz (-15). See “Allowable Input Frequency to

Output Frequency” table for conditions

•

On-chip loop filter

Single 5 V power supply

Low power CMOS technology

8-pin SOIC package

For new video genlock applications, please refer to the

ICS673-01, ICS1522 or ICS1523.

Block Diagram

IDT™

VIDEO GENLOCK PLL

MK9173-01/-15

REV C 12/21/06

MK9173-15CS08LF相似产品对比

	MK9173-15CS08LF	MK9173-15CS08	MK9173-15CS08T	MK9173-01CS08	MK9173-01CS08T
描述	PLL Based Clock Driver, 9173 Series, 2 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, SOIC-8	PLL Based Clock Driver, 9173 Series, 2 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, SOIC-8	PLL Based Clock Driver, 9173 Series, 2 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, SOIC-8	PLL Based Clock Driver, 9173 Series, 2 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, SOIC-8	PLL Based Clock Driver, 9173 Series, 2 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, SOIC-8
是否Rohs认证	符合	不符合	不符合	不符合	不符合
厂商名称	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
零件包装代码	SOIC	SOIC	SOIC	SOIC	SOIC
包装说明	SOIC-8	SOIC-8	SOIC-8	SOIC-8	SOIC-8
针数	8	8	8	8	8
Reach Compliance Code	unknown	not_compliant	not_compliant	not_compliant	not_compliant
Is Samacsys	N	N	N	N	N
系列	9173	9173	9173	9173	9173
输入调节	STANDARD	STANDARD	STANDARD	STANDARD	STANDARD
JESD-30 代码	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8
JESD-609代码	e3	e0	e0	e0	e0
长度	4.9 mm	4.9 mm	4.9 mm	4.9 mm	4.9 mm
逻辑集成电路类型	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER
功能数量	1	1	1	1	1
端子数量	8	8	8	8	8
实输出次数	2	2	2	2	2
最高工作温度	70 °C	70 °C	70 °C	70 °C	70 °C
输出特性	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	SOP	SOP	SOP	SOP	SOP
封装形状	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE
峰值回流温度（摄氏度）	NOT SPECIFIED	240	240	240	NOT SPECIFIED
认证状态	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
座面最大高度	1.75 mm	1.75 mm	1.75 mm	1.75 mm	1.75 mm
最大供电电压 (Vsup)	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V
最小供电电压 (Vsup)	4.75 V	4.75 V	4.75 V	4.75 V	4.75 V
标称供电电压 (Vsup)	5 V	5 V	5 V	5 V	5 V
表面贴装	YES	YES	YES	YES	YES
技术	CMOS	CMOS	CMOS	CMOS	CMOS
温度等级	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
端子面层	MATTE TIN	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	TIN LEAD
端子形式	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
端子节距	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm
端子位置	DUAL	DUAL	DUAL	DUAL	DUAL
处于峰值回流温度下的最长时间	NOT SPECIFIED	30	30	30	NOT SPECIFIED
宽度	3.9 mm	3.9 mm	3.9 mm	3.9 mm	3.9 mm
最小 fmax	37.5 MHz	37.5 MHz	37.5 MHz	75 MHz	75 MHz
Base Number Matches	1	1	1	1	1
是否无铅	-	含铅	含铅	含铅	含铅
湿度敏感等级	-	1	1	1	-

MK9173-15CS08LF

MK9173-15CS08LF概述

MK9173-15CS08LF规格参数

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MK9173-15CS08LF相似产品对比

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