D ts e t
aa h e
R c e t r lc r nc
o h se Ee to is
Ma u a t r dCo o e t
n fc u e
mp n n s
R c e tr b a d d c mp n ns ae
o h se rn e
o oet r
ma ua trd u ig ete dewaes
n fcue sn i r i/ fr
h
p rh s d f m te oiia s p l r
uc a e r
o h r n l u pi s
g
e
o R c e tr waes rce td f m
r o h se
fr e rae r
o
te oiia I. Al rce t n ae
h
r nl P
g
l e rai s r
o
d n wi tea p o a o teOC
o e t h p rv l f h
h
M.
P r aetse u igoiia fcoy
at r e td sn r n la tr
s
g
ts p o rmso R c e tr e eo e
e t rga
r o h se d v lp d
ts s lt n t g aa te p o u t
e t oui s o u rne
o
rd c
me t o e c e teOC d t s e t
es r x e d h
M aa h e.
Qu l yOv riw
ai
t
e ve
• IO- 0 1
S 90
•A 92 cr ct n
S 1 0 et ai
i
o
• Qu l e Ma ua trr Ls (
ai d
n fcues it QML MI- R -
) LP F
385
53
•C a sQ Mitr
ls
lay
i
•C a sVS a eL v l
ls
p c ee
• Qu l e S p l r Ls o D sr uos( L )
ai d u pi s it f it b tr QS D
e
i
•R c e trsacic l u pir oD A a d
o h se i
r ia s p l t L n
t
e
me t aln u t a dD A sa d r s
es lid sr n L tn ad .
y
R c e tr lcrnc , L i c mmi e t
o h se Ee t is L C s o
o
tdo
t
s p ligp o u t ta s t f c so r x e t-
u pyn rd cs h t ai y u tme e p ca
s
t n fr u lya daee u loto eoiial
i s o q ai n r q a t h s r n l
o
t
g
y
s p l db id sr ma ua trr.
u pi
e yn ut
y n fcues
T eoiia ma ua trr d ts e t c o a yn ti d c me t e e t tep r r n e
h r n l n fcue’ aa h e a c mp n ig hs o u n r cs h ef ma c
g
s
o
a ds e ic t n o teR c e tr n fcue v rino ti d vc . o h se Ee t n
n p c ai s f h o h se ma ua trd eso f hs e ie R c e tr lcr -
o
o
isg aa te tep r r n eo i s mio d co p o u t t teoiia OE s e ic -
c u rne s h ef ma c ft e c n u tr rd cs o h r n l M p c a
o
s
g
t n .T pc lv le aefr eee c p r o e o l. eti mii m o ma i m rt g
i s ‘y ia’ au s r o rfrn e up s s ny C r n nmu
o
a
r xmu ai s
n
ma b b s do p o u t h rceiain d sg , i lt n o s mpetsig
y e a e n rd c c aa tr t , e in smuai , r a l e t .
z o
o
n
© 2 1 R cetr l t n s LC Al i t R sre 0 1 2 1
0 3 ohs E cr i , L . lRg s eevd 7 1 0 3
e e oc
h
T l r m r, l s v iw wrcl . m
o e n oe p ae it w . e c o
a
e
s
o ec
74LVT32245 • 74LVTH32245 Low Voltage 32-Bit Transceiver with 3-STATE Outputs
March 2002
Revised June 2002
74LVT32245 • 74LVTH32245
Low Voltage 32-Bit Transceiver with 3-STATE Outputs
General Description
The LVT32245 and LVTH32245 contain thirty-two non-
inverting bidirectional buffers with 3-STATE outputs and are
intended for bus oriented applications. The devices are
byte controlled. Each byte has separate control inputs
which can be shorted together for full 32-bit operation. The
T/R inputs determine the direction of data flow through the
device. The OE inputs disable both the A and B ports by
placing them in a high impedance state.
The LVTH32245 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These non-inverting transceivers are designed for low volt-
age (3.3V) V
CC
applications, but with the capability to pro-
vide a TTL interface to a 5V environment. The LVT32245
and LVTH32245 are fabricated with an advanced BiCMOS
technology to achieve high speed operation similar to 5V
ABT while maintaining low power dissipation.
Features
s
Input and output interface capability to systems at
5V V
CC
s
Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH32245),
also available without bushold feature (74LVT32245).
s
Live insertion/extraction permitted
s
Power Up/Down high impedance provides glitch-free
bus loading
s
Outputs source/sink
−
32 mA/
+
64 mA
s
ESD performance:
Human-body model
>
2000V
Machine model
>
200V
Charged-device model
>
1000V
s
Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
Ordering Code:
Order Number
74LVT32245G
(Note 1)(Note 2)
74LVTH32245G
(Note 1)(Note 2)
Package Number
BGA96A
(Preliminary)
BGA96A
Package Description
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
Note 1:
Ordering code “G” indicates Trays.
Note 2:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
© 2002 Fairchild Semiconductor Corporation
DS500433
www.fairchildsemi.com
74LVT32245 • 74LVTH32245
Connection Diagram
Pin Descriptions
Pin Names
OE
n
T/R
n
A
0
–A
31
B
0
–B
31
Description
Output Enable Input (Active LOW)
Transmit/Receive Input
Side A Inputs/3-STATE Outputs
Side B Inputs/3-STATE Outputs
FBGA Pin Assignments
1
A
B
C
D
E
F
G
(Top Thru View)
H
J
K
L
M
N
P
R
T
B
1
B
3
B
5
B
7
B
9
B
11
B
13
B
14
B
17
B
19
B
21
B
23
B
25
B
27
B
29
B
30
2
B
0
B
2
B
4
B
6
B
8
B
10
B
12
B
15
B
16
B
18
B
20
B
22
B
24
B
26
B
28
B
31
3
T/R
1
GND
V
CC1
GND
GND
V
CC1
GND
T/R
2
T/R
3
GND
V
CC2
GND
GND
V
CC2
GND
T/R
4
4
OE
1
GND
V
CC1
GND
GND
V
CC1
GND
OE
2
OE
3
GND
V
CC2
GND
GND
V
CC2
GND
OE
4
5
A
0
A
2
A
4
A
6
A
8
A
10
A
12
A
15
A
16
A
18
A
20
A
22
A
24
A
26
A
28
A
31
6
A
1
A
3
A
5
A
7
A
9
A
11
A
13
A
14
A
17
A
19
A
21
A
23
A
25
A
27
A
29
A
30
Truth Tables
Inputs
OE
1
L
L
H
Inputs
OE
2
L
L
H
T/R
2
L
H
X
Outputs
Bus B
8
–B
15
Data to Bus A
8
–A
15
Bus A
8
–A
15
Data to Bus B
8
–B
15
HIGH–Z State on A
8
–A
15
,B
8
–B
15
T/R
1
L
H
X
Outputs
Bus B
0
–B
7
Data to Bus A
0
–A
7
Bus A
0
–A
7
Data to Bus B
0
–B
7
HIGH–Z State on A
0
–A
7
,B
0
–B
7
Inputs
OE
3
L
L
H
Inputs
OE
4
L
L
H
T/R
4
L
H
X
Outputs
Bus B
24
–B
31
Data to Bus A
24
–A
31
Bus B
24
–A
31
Data to Bus B
24
–B
31
HIGH–Z State on A
24
–A
31
,B
24
–B
31
T/R
3
L
H
X
Outputs
Bus B
16
–B
23
Data to Bus A
16
–A
23
Bus A
16
–A
23
Data to Bus B
16
–B
23
HIGH–Z State on A
16
–A
23
,B
16
–B
23
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
www.fairchildsemi.com
2
74LVT32245 • 74LVTH32245
Functional Description
The LVT32245 and LVTH32245 contain thirty-two non-inverting bidirectional buffers with 3-STATE outputs. The device is
byte controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together
to obtain 16-bit or full 32-bit operation.
Logic Diagrams
Byte 1
Byte 3
Byte 2
Byte 4
V
CC1
is associated with Bytes 1 and 2.
V
CC2
is associated with Bytes 3 and 4.
Note:
Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.
3
www.fairchildsemi.com
74LVT32245 • 74LVTH32245
Absolute Maximum Ratings
(Note 3)
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
I
GND
T
STG
Parameter
Supply Voltage
DC Input Voltage
Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature Range
Value
Conditions
Units
V
V
Output in 3-STATE
Output in HIGH or LOW State (Note 4)
V
I
<
GND
V
O
<
GND
Output at HIGH State, V
O
>
V
CC
Output at LOW State, V
O
>
V
CC
V
mA
mA
mA
mA
mA
−
0.5 to
+
4.6
−
0.5 to
+
7.0
−
0.5 to
+
7.0
−
0.5 to
+
7.0
−
50
−
50
64
128
±
64
±
128
−
65 to
+
150
°
C
Recommended Operating Conditions
Symbol
V
CC
V
I
I
OH
I
OL
T
A
Supply Voltage
Input Voltage
HIGH-Level Output Current
LOW-Level Output Current
Free-Air Operating Temperature
Input Edge Rate, V
IN
=
0.8V–2.0V, V
CC
=
3.0V
Parameter
Min
2.7
0
Max
3.6
5.5
Units
V
V
mA
mA
−
32
64
−
40
0
+
85
10
°
C
ns/V
∆
t/
∆
V
Note 3:
Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied.
Note 4:
I
O
Absolute Maximum Ratings must be observed.
DC Electrical Characteristics
Symbol
V
IK
V
IH
V
IL
V
OH
Parameter
Input Clamp Diode Voltage
Input HIGH Voltage
Input LOW Voltage
Output HIGH Voltage
V
CC
(V)
2.7
2.7–3.6
2.7–3.6
2.7–3.6
2.7
3.0
V
OL
Output LOW Voltage
2.7
2.7
3.0
3.0
3.0
I
I(HOLD)
(Note 5)
I
I(OD)
(Note 5)
I
I
Bushold Input Over-Drive
Current to Change State
Input Current
Control Pins
Data Pins
I
OFF
I
PU/PD
I
OZL
I
OZH
Power Off Leakage Current
Power Up/Down 3-STATE
Output Current
3-STATE Output Leakage Current
3-STATE Output Leakage Current
I
OZL
(Note 5) 3-STATE Output Leakage Current
3.6
3.6
3.6
0
0–1.5
3.6
3.6
3.6
3.0
Bushold Input Minimum Drive
3.0
75
−75
500
−500
10
±1
−5
1
±100
±100
−5
−5
5
µA
µA
µA
µA
µA
µA
V
CC
−
0.2
2.4
2.0
0.2
0.5
0.4
0.5
0.55
µA
µA
V
V
2.0
0.8
T
A
= −40°C
to
+85°C
Min
Max
−1.2
Units
V
V
V
Conditions
I
I
= −18
mA
V
O
≤
0.1V or
V
O
≥
V
CC
−
0.1V
I
OH
= −100 µA
I
OH
= −8
mA
I
OH
= −32
mA
I
OL
=
100
µA
I
OL
=
24 mA
I
OL
=
16 mA
I
OL
=
32 mA
I
OL
=
64 mA
V
I
=
0.8V
V
I
=
2.0V
(Note 6)
(Note 7)
V
I
=
5.5V
V
I
=
0V or V
CC
V
I
=
0V
V
I
=
V
CC
0V
≤
V
I
or V
O
≤
5.5V
V
O
=
0.5V to 3.0V
V
I
=
GND or V
CC
V
O
=
0.5V
V
O
=
0.0V
V
O
=
3.0V
www.fairchildsemi.com
4
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
