8/2014
J270, J271
P-Channel Silicon Junction Field-Effect Transistor
∙
∙
∙
Analog Switch
Sample and Hold
Low Noise, High Gain Amplifier
J270
Min Max
-30
200
0.5
-2
2
-15
Absolute maximum ratings at T
A
= 25
o
C
Reverse Gate Source & Gate Drain Voltage
-30V
Continuous Forward Gate Current
50 mA
Continuous Device Power Dissipation
360 mW
Power Derating
2.8 mW/
o
C
At 25
o
C free air temperature
Static Electrical Characteristics
Gate Source Breakdown
V
(BR)GSS
Voltage
Gate Reverse Current
I
GSS
Gate Source Cutoff Voltage
Drain Saturation Current
(pulsed)
V
GS(OFF)
I
DSS
J271
Min
Max
-30
200
1.5
-6
4.5
-50
Process PJ99
Unit
V
pA
V
mA
Test Conditions
I
G
= 1 uA, V
DS
= 0 V
V
GS
= 10 V, V
DS
= 0 V
V
DS
= -10 V, V
GS
= 0 V
V
DS
= -10 V, V
GS
= 0 V
Dynamic Electrical Characteristics
Common-Source Forward
g
fs
Transconductance
Common-Source Input
Capacitance
Common-Source Reverse
Transfer Capacitance
Typical
Equivalent Short Circuit Input
Noise Voltage
C
iss
C
rss
6
15
32
4
8
18
32
4
mS
pF
pF
V
DS
= -10 V, V
GS
= 0 V
V
DS
= -10 V, V
GS
= 0 V
V
DS
= -10 V, V
GS
= 0 V
f=1
kHz
f=1
MHz
f=1
MHz
f=1
kHz
~e
N
6
6
nV/√Hz
V
DS
= 10 V, I
D
= 5 mA
SMP2608, SMP2609
SMPJ270, SMPJ271
715 N. Glenville Dr., Ste. 400
Richardson, TX 75089
(972) 238-9700 Fax (972) 238-5338
www.interfet.com
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