SATAULC6-2M6
Ultra low capacitance ESD protection
Datasheet
-
production data
•
Low leakage current for longer operation of
battery powered devices
•
Higher reliability offered by monolithic
integration
•
Designed for go-through layout
Complies with these standards
µQFN (pin view)
SATAULC6-2M6
•
IEC 61000-4-2 level 4
– 15 kV air discharge
– 8 kV contact discharge
•
MIL STD883G-Method 3015-7
Applications
Features
•
2-line ESD protection (at 15 kV air and contact
discharge, exceeds IEC 61000-4-2)
•
Protects V
BUS
when applicable
•
Ultra low capacitance: 0.9 pF @ 825 MHz
•
Fast response time
•
µQFN package
•
RoHS compliant
•
SATA port up to 3 Gb/s
•
DVI and HDMI ports up to 1.65 Gb/s
•
IEEE 1394a and b (Firewire) ports up to
1.6 Gb/s
•
USB 2.0 ports up to 480 Mb/s (Hi-Speed),
backwards compatible with USB 1.1 low and
full speed
•
Ethernet port: 10/100/1000 Mb/s
•
SIM card protection
•
Video line protection
•
Portable electronics
Benefits
•
ESD protection of V
BUS
when applicable
•
Optimized rise and fall times for maximum data
integrity
•
Large bandwidth to minimize impact on data
signal quality
•
Consistent differential signal balance:
– Ultra low impact on intra- and inter-pair
skew
– Matching high bit rate SATA, DVI, HDMI
and IEEE 1394 requirements
•
Low PCB space occupation - 1.45 mm
2
for
µQFN
Description
The SATAULC6-2M6 is a monolithic, application
specific discrete device dedicated to ESD
protection of high speed interfaces.
Its very low line capacitance secures a high level
of signal integrity. The device topology provides
this integrity without compromising the complete
protection of ICs against the most stringent ESD
strikes.
October 2015
This is information on a product in full production.
DocID15254 Rev 2
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Characteristics
SATAULC6-2M6
1
Characteristics
Figure 1. Functional diagram
I/O1
1
6
NC
I/O2
2
5
NC
GND
3
4
V
BUS
µQFN 6 leads
Table 1. Absolute ratings
Symbol
V
PP
T
stg
T
j
T
L
Peak pulse voltage
Storage temperature range
Maximum junction temperature
Lead solder temperature (10 seconds duration)
Parameter
IEC 61000-4-2 air discharge
IEC 61000-4-2 contact discharge
MIL STD883G-Method 3015-7
Value
±15
±15
±25
-55 to +150
125
260
Unit
kV
°C
°C
°C
Table 2. Electrical characteristics (T
amb
= 25 °C)
Value
Symbol
I
RM
V
BR
Parameter
Leakage current
Breakdown voltage between V
BUS
and GND
Test conditions
Min.
V
RM
= 5 V
I
R
= 1 mA
I
PP
= 1 A, t
p
= 8/20 µs
Any I/O pin to GND
V
CL
Clamping voltage
I
PP
= 5 A, t
p
= 8/20 µs
Any I/O pin to GND
Capacitance between I/O
Capacitance between I/O and GND
Capacitance variation between I/O
and GND
V
R
= 0 V, F = 825 MHz
GND not connected
V
R
= 0 V, F = 825 MHz
Any I/0 pin to GND
V
R
= 0 V, F = 1 MHz
0.08
19
0.45
0.9
V
pF
pF
pF
6
12
Typ.
Max
0.5
µA
V
V
Unit
C
i/o-i/o
C
i/o-GND
ΔC
i/o-GND
2/10
DocID15254 Rev 2
SATAULC6-2M6
Characteristics
Figure 2. Line capacitance versus frequency
(typical values)
C(pF)
1.00
Vosc=30mVrms
T
j
= 25 °C
V
I-O/GND
= 0V
V
BUS
OPEN
Figure 3. Attenuation (typical values)
dB
0.00
-3.00
0.80
4.8 GHz @ -3dB
-6.00
C
I/O - GND
0.60
-9.00
0.40
-12.00
0.20
C
I/O – I/O
-15.00
F(MHz)
0.00
1
10
100
1000
10000
-18.00
300.0k
1.0M
3.0M
IO1
F(Hz)
10.0M 30.0M 100.0M300.0M 1.0G
IO2
3.0G
Figure 4. Eye diagram at 1.5 Gbps
PCB + device
Figure 5. Eye diagram at 1.5 Gbps
PCB only
Figure 6. Eye diagram at 3.0 Gbps
PCB only
Figure 7. Eye diagram at 3.0 Gbps
PCB + device
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SATAULC6-2M6
Recommendation on PCB assembly
3
3.1
Recommendation on PCB assembly
Stencil opening design
1.
General recommendation on stencil opening design
a)
Stencil opening dimensions: L (Length), W (Width), T (Thickness)
Figure 9. Stencil opening dimensions
L
T
W
b)
General design rule
Stencil thickness (T) = 75 ~ 125 µm
W
Aspect Ratio = ----
≥
1.5
-
T
L
×
W
Aspect Area = ---------------------------
≥
0.66
-
2T
(
L + W
)
2.
Reference design
a)
b)
Stencil opening thickness: 100 µm
Stencil opening for leads: Opening to footprint ratio is 90%.
Figure 10. Recommended stencil window position (µQFN only)
7 µm
7 µm
15 µm
650 µm
620 µm
236 µm
15 µm
250 µm
Footprint
Stencil window
Footprint
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