74VHCT16374A
16-BIT D-TYPE FLIP FLOP
WITH 3-STATE OUTPUTS NON INVERTING
s
s
s
s
s
s
s
s
s
s
HIGH SPEED:
f
MAX
= 185 MHz (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 4
µA
(MAX.) at T
A
=25°C
COMPATIBLE WITH TTL OUTPUTS:
V
IH
=2V (MIN.) V
IL
= 0.8 (MAX.)
POWER DOWN PROTECTION ON INPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8 mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
≅
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 16374
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: V
OLP
= 0.9V (MAX.)
TSSOP
ORDER CODES
PACKAGE
TSSOP
TUBE
T&R
74VHCT16374ATTR
PIN CONNECTION
DESCRIPTION
The 74VHCT16374A is an advanced high-speed
CMOS 16 D-TYPE FLIP FLOP with 3 STATE
OUTPUTS NON INVERTING fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
These 16 bit D-TYPE flip-flop is controlled by two
clock inputs (CK) and two output enable inputs
(nOE). The device can be used as two 8-bit
flip-flops or one 16-bit flip-flop.
On the positive transition of the clock, the Q
outputs will be set to the logic state that were
setup at the D inputs.
While the (OE) input is low, the outputs will be in
a normal logic state (high or low logic level); while
OE is high, the outputs will be in a high impedance
state.
The output control does not affect the internal op-
eration of flip-flops; that is, the old data can be re-
tained or the new data can be entered even while
the outputs are off.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with protec-
tion circuits against static discharge, giving them
2KV ESD immunity and transient excess voltage.
February 2003
1/10
74VHCT16374A
INPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
1
2, 3, 5, 6, 8, 9,
11, 12
13, 14, 16, 17,
19, 20, 22, 23
24
SYMBOL
1OE
1Q0 to
1Q7
2Q0 to
2Q7
2OE
NAME AND FUNCTION
3 State Output Enable
Input (Active LOW)
3-State Outputs
3-State Outputs
IEC LOGIC SYMBOLS
3 State Output Enable
Input (Active LOW)
25
2CK
Clock Input (LOW-to-HIGH
Edge Trigger)
36, 35, 33, 32, 2D0 to 2D7 Data Inputs
30, 29, 27, 26
47, 46, 44, 43, 1D0 to 1D7 Data Inputs
41, 40, 38, 37
48
1CK
Clock Input (LOW-to-HIGH
Edge Trigger)
4, 10, 15, 21,
GND
Ground (0V)
28, 34, 39, 45
7, 18, 31, 42
V
CC
Positive Supply Voltage
TRUTH TABLE
INPUTS
OE
H
L
L
L
X : Don’t Care
Z : High Impedance
OUTPUTS
D
X
X
L
H
Q
Z
NO CHANGE
L
H
CK
X
2/10
74VHCT16374A
LOGIC DIAGRAM
This logic diagram has not to be used to estimate propagation delays
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
Parameter
Value
-0.5 to +7.0
-0.5 to +7.0
-0.5 to V
CC
+ 0.5
- 20
±
20
±
25
±
75
-65 to +150
300
Unit
V
V
V
mA
mA
mA
mA
°C
°C
I
CC
or I
GND
DC V
CC
or Ground Current
T
stg
Storage Temperature
T
L
Lead Temperature (10 sec)
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
T
op
dt/dv
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Input Rise and Fall Time (note 1) (Vcc= 5.0±0.5V)
Parameter
Value
4.5 to 5.5
0 to 5.5
0 to V
CC
-55 to 125
0 to 20
Unit
V
V
V
°C
ns/V
1) V
IN
from 0.8V to 2.0V
3/10
74VHCT16374A
CAPACITIVE CHARACTERISTICS
Test Condition
Symbol
Parameter
V
CC
(V)
T
A
= 25°C
Min.
Typ.
4
6
5.0
f
IN
= 10MHz
21
Max.
10
Value
-40 to 85°C
Min.
Max.
10
-55 to 125°C
Min.
Max.
10
pF
pF
pF
Unit
C
IN
C
OUT
C
PD
Input Capacitance
Output
Capacitance
Power Dissipation
Capacitance
(note 1)
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/16 (per
Latch)
DYNAMIC SWITCHING CHARACTERISTICS
Test Condition
Symbol
Parameter
V
CC
(V)
5.0
T
A
= 25°C
Min.
Typ.
0.6
-0.9
C
L
= 50 pF
3.5
-0.6
Max.
0.9
V
Value
-40 to 85°C
Min.
Max.
-55 to 125°C
Min.
Max.
Unit
V
OLP
V
OLV
V
IHD
V
ILD
Dynamic Low
Voltage Quiet
Output (note 1, 2)
Dynamic High
Voltage Input
(note 1, 3)
Dynamic Low
Voltage Input
(note 1, 3)
5.0
V
5.0
1.5
V
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 5.0V. Inputs under test switching: 5.0V to threshold (V
ILD
), 0V to threshold
(V
IHD
), f=1MHz.
5/10
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