Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any
of these limits are exceeded, device functionality should not be assumed, damage may occur
and reliability may be affected.
†Derating — SOIC Package: – 7 mW/_C from 65_ to 125_C
TSSOP Package: − 6.1 mW/_C from 65_ to 125_C
ÎÎÎ
Î
Î
Î
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ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
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Î
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Î
Î
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Î
Î
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Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ
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MAXIMUM RATINGS
Symbol
V
CC
V
out
T
stg
I
CC
I
OK
I
out
V
in
P
D
I
IK
Storage Temperature
Power Dissipation in Still Air,
DC Supply Current, V
CC
and GND Pins
DC Output Current, per Pin
Output Diode Current
Input Diode Current
DC Output Voltage
DC Input Voltage
DC Supply Voltage
Parameter
SOIC Package†
TSSOP Package†
DC ELECTRICAL CHARACTERISTICS
RECOMMENDED OPERATING CONDITIONS
Symbol
Symbol
V
OH
V
OL
V
CC
V
out
V
IH
I
CC
t
r
, t
f
V
IL
V
in
T
A
I
in
Maximum Quiescent
Supply Current
Maximum Input
Leakage Current
Maximum Low−Level
Output Voltage
Minimum High−Level
Output Voltage
Maximum Low−Level
Input Voltage
Minimum High−Level
Input Voltage
Input Rise and Fall Time
Operating Temperature
DC Output Voltage
DC Input Voltage
DC Supply Voltage
Parameter
Parameter
V
in
= V
CC
or GND
V
in
= 5.5 or GND
V
in
= V
IH
or V
IL
I
OL
= 4mA
I
OL
= 8mA
V
in
= V
IH
or V
IL
I
OL
= 50μA
V
in
= V
IH
or V
IL
I
OH
= −4mA
I
OH
= −8mA
V
in
= V
IH
or V
IL
I
OH
= −50μA
Test Conditions
V
CC
= 3.3V
±0.3V
V
CC
= 5.0V
±0.5V
http://onsemi.com
0 to 5.5
2.0
3.0 to
5.5
2.0
3.0 to
5.5
V
CC
V
5.5
3.0
4.5
2.0
3.0
4.5
3.0
4.5
2.0
3.0
4.5
Min
−40
2.0
Value
0
0
0
0
±
50
±
25
±
20
500
450
−20
1.9
2.9
4.4
MC74VHC04
–0.5 to V
CC
+ 0.5
2
– 65 to + 150
–0.5 to + 7.0
–0.5 to + 7.0
1.50
V
CC
x 0.7
2.58
3.94
Min
+ 85
Max
V
CC
100
20
5.5
5.5
T
A
= 25°C
Typ
0.0
0.0
0.0
2.0
3.0
4.5
ns/V
Unit
Unit
mW
mA
mA
mA
mA
_C
_C
V
V
V
V
V
V
0.50
V
CC
x 0.3
±
0.1
0.36
0.36
Max
0.1
0.1
0.1
2.0
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance cir-
cuit. For proper operation, V
in
and
V
out
should be constrained to the
range GND
v
(V
in
or V
out
)
v
V
CC
.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V
CC
).
Unused outputs must be left open.
1.50
V
CC
x 0.7
T
A
= −40 to 85°C
2.48
3.80
Min
1.9
2.9
4.4
0.50
V
CC
x 0.3
±
0.1
0.44
0.44
Max
0.1
0.1
0.1
20.0
Unit
μA
μA
V
V
V
V
MC74VHC04
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î
Î
Î
ÎÎ Î Î Î Î Î
Î
Î
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Î Î Î Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î Î
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Î Î Î
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Î
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ÎÎÎ Î ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ ÎÎÎÎÎÎ Î
Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3.0ns)
Symbol
t
PLH
,
t
PHL
Parameter
T
A
= 25°C
Typ
5.0
7.5
3.8
5.3
4
T
A
= −40 to 85°C
Min
1.0
1.0
1.0
1.0
Max
Test Conditions
Min
Max
Unit
ns
Maximum Propagation Delay,
A or B to Y
V
CC
= 3.3
±
0.3V
V
CC
= 5.0
±
0.5V
C
L
= 15pF
C
L
= 50pF
C
L
= 15pF
C
L
= 50pF
7.1
10.6
5.5
7.5
10
8.5
12.0
6.5
8.5
10
C
in
Maximum Input Capacitance
pF
Typical @ 25°C, V
CC
= 5.0V
18
C
PD
Power Dissipation Capacitance (Per Inverter) (Note 1)
pF
1. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= C
PD
V
CC
f
in
+ I
CC
/ 6 (per buffer). C
PD
is used to determine the
no−load dynamic power consumption; P
D
= C
PD
V
CC2
f
in
+ I
CC
V
CC
.
NOISE CHARACTERISTICS
(Input t
r
= t
f
= 3.0ns, C
L
= 50pF, V
CC
= 5.0V)
T
A
= 25°C
Symbol
V
OLP
V
OLV
V
IHD
V
ILD
Characteristic
Quiet Output Maximum Dynamic V
OL
Quiet Output Minimum Dynamic V
OL
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
Typ
0.4
−0.4
Max
0.8
−0.8
3.5
1.5
TEST POINT
A
50%
GND
t
PLH
Y
50% V
CC
*Includes all probe and jig capacitance
t
PHL
V
CC
DEVICE
UNDER
TEST
OUTPUT
C
L
*
Unit
V
V
V
V
Figure 3. Switching Waveforms
Figure 4. Test Circuit
INPUT
Figure 5. Input Equivalent Circuit
http://onsemi.com
3
MC74VHC04
PACKAGE DIMENSIONS
SOIC−14
CASE 751A−03
ISSUE K
D
14
A
B
8
A3
H
1
7
E
L
DETAIL A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
DIM
A
A1
A3
b
D
E
e
H
h
L
M
MILLIMETERS
MIN
MAX
1.35
1.75
0.10
0.25
0.19
0.25
0.35
0.49
8.55
8.75
3.80
4.00
1.27 BSC
5.80
6.20
0.25
0.50
0.40
1.25
0
_
7
_
INCHES
MIN
MAX
0.054 0.068
0.004 0.010
0.008 0.010
0.014 0.019
0.337 0.344
0.150 0.157
0.050 BSC
0.228 0.244
0.010 0.019
0.016 0.049
0
_
7
_
0.25
M
B
M
13X
b
0.25
M
C A
A
S
B
S
X 45
_
h
DETAIL A
e
A1
C
SEATING
PLANE
M
SOLDERING FOOTPRINT*
6.50
1
14X
1.18
1.27
PITCH
14X
0.58
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
4
MC74VHC04
PACKAGE DIMENSIONS
TSSOP−14
CASE 948G
ISSUE B
14X
K
REF
0.10 (0.004)
0.15 (0.006) T U
S
M
T U
S
V
S
N
2X
L/2
14
8
0.25 (0.010)
M
L
PIN 1
IDENT.
1
7
B
−U−
N
F
DETAIL E
K
K1
J J1
0.15 (0.006) T U
S
SECTION N−N
−W−
C
0.10 (0.004)
−T−
SEATING
PLANE
D
G
H
DETAIL E
SOLDERING FOOTPRINT
7.06
1
14X
0.36
14X
1.26
ON Semiconductor and the
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