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MB96F673ABPMC1-GS-112E2

产品描述16-bit Microcontrollers - MCU MB96F673ABPMC1-GS-112E2 TP03S05 STANDARD MICOM FLASH MICOM-0.35
产品类别半导体    嵌入式处理器和控制器   
文件大小1MB,共69页
制造商Cypress(赛普拉斯)
标准
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MB96F673ABPMC1-GS-112E2概述

16-bit Microcontrollers - MCU MB96F673ABPMC1-GS-112E2 TP03S05 STANDARD MICOM FLASH MICOM-0.35

MB96F673ABPMC1-GS-112E2规格参数

参数名称属性值
Product AttributeAttribute Value
制造商
Manufacturer
Cypress(赛普拉斯)
产品种类
Product Category
16-bit Microcontrollers - MCU
RoHSDetails
系列
Packaging
Tray
Moisture SensitiveYes
工厂包装数量
Factory Pack Quantity
160

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CY96670 Series
F
2
MC-16FX 16-Bit Microcontroller
CY96670 series is based on Cypress’s advanced F
2
MC-16FX architecture (16-bit with instruction pipeline for RISC-like
performance). The CPU uses the same instruction set as the established F
2
MC-16LX family thus allowing for easy migration of
F
2
MC-16LX Software to the new F
2
MC-16FX products.
F
2
MC-16FX product improvements compared to the previous generation include significantly improved performance - even at the
same operation frequency, reduced power consumption and faster start-up time.
For high processing speed at optimized power consumption an internal PLL can be selected to supply the CPU with up to 32MHz
operation frequency from an external 4MHz to 8MHz resonator. The result is a minimum instruction cycle time of 31.2ns going
together with excellent EMI behavior. The emitted power is minimized by the on-chip voltage regulator that reduces the internal CPU
voltage. A flexible clock tree allows selecting suitable operation frequencies for peripheral resources independent of the CPU speed.
Features
Technology
0.18m CMOS
DMA
Automatic transfer function independent of CPU, can be
assigned freely to resources
CPU
F
2
MC-16FX
CPU
Optimized instruction set for controller applications
(bit, byte, word and long-word data types, 23 different
addressing modes, barrel shift, variety of pointers)
8-byte instruction queue
Signed multiply (16-bit × 16-bit) and divide (32-bit/16-bit)
instructions available
Interrupts
Fast
Interrupt processing
8 programmable priority levels
Non-Maskable Interrupt (NMI)
CAN
CAN protocol version 2.0 part A and B
ISO16845 certified
Bit rates up to 1Mbps
32 message objects
Each message object has its own identifier mask
Programmable FIFO mode (concatenation of message
objects)
Maskable interrupt
Disabled Automatic Retransmission mode for Time
Triggered CAN applications
Programmable loop-back mode for self-test operation
Supports
System clock
PLL clock multiplier (1 to
8, 1
when PLL stop)
4MHz to 8MHz crystal oscillator
(maximum frequency when using ceramic resonator
depends on Q-factor)
Up to 8MHz external clock for devices with fast clock input
feature
32.768kHz subsystem quartz clock
100kHz/2MHz internal RC clock for quick and safe startup,
clock stop detection function, watchdog
Clock source selectable from mainclock oscillator, subclock
oscillator and on-chip RC oscillator, independently for CPU
and 2 clock domains of peripherals
The subclock oscillator is enabled by the Boot ROM
program controlled by a configuration marker after a Power
or External reset
Low Power Consumption - 13 operating modes (different
Run, Sleep, Timer, Stop modes)
On-chip
USART
Full
On-chip voltage regulator
Internal voltage regulator supports a wide MCU supply
voltage range (Min=2.7V), offering low power consumption
duplex USARTs (SCI/LIN)
Wide range of baud rate settings using a dedicated reload
timer
Special synchronous options for adapting to different
synchronous serial protocols
LIN functionality working either as master or slave LIN
device
Extended support for LIN-Protocol to reduce interrupt load
I
2
C
to 400kbps
Master and Slave functionality, 7-bit and 10-bit addressing
Up
Low voltage detection function
Reset is generated when supply voltage falls below
programmable reference voltage
Code Security
Protects Flash Memory content from unintended read-out
Cypress Semiconductor Corporation
Document Number: 002-04703 Rev. *B
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised December 22, 2017
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