and 16-bit digital-to-analog converters (DACs). The
MAX5215/MAX5217 are single-channel, low-powered,
buffered voltage-output DACs. The devices use a preci-
sion external reference applied through the high resis-
tance input for rail-to-rail operation and low system power
consumption. The MAX5215/MAX5217 accept a wide
2.7V to 5.5V supply voltage range. Power consumption
is extremely low to accommodate most low-power and
low-voltage applications.
The MAX5215/MAX5217 have an I
2
C-compatible, 2-wire
serial interface that operates at clock rates up to 400kHz.
On power-up, the MAX5215/MAX5217 reset the DAC out-
put to zero, providing additional safety for applications
that drive valves or other transducers that need to be off
on power-up. The DAC output is buffered resulting in a
low supply current of 80µA (max) and a low offset error
of ±0.25mV. An asynchronous active-low input,
AUX,
is provided. This input can be programmed to support
clear or load DAC operations, independent of the serial
interface. The MAX5215/MAX5217 are available in an
ultra-small (3mm x 5mm), 8-pin µMAXM package and are
specified over the -40°C to +105°C extended industrial
temperature range.
S
18µs Settling Time
S
16-/14-Bit Resolution in a 3mm x 5mm, 8-Pin
µMAX Package
S
Relative Accuracy
±0.4 LSB INL (MAX5215, 14 Bit) typ, 1 LSB (max)
±1.2 LSB INL (MAX5217, 16 Bit) typ, 4 LSB (max)
S
Guaranteed Monotonic Over All Operating Range
S
Low Gain and Offset Error
S
Wide 2.7V to 5.5V Supply Range
S
Rail-to-Rail Buffered Output Operation
S
Safe Power-Up-Reset to Zero DAC Output
S
I
2
C-Compatible 400kHz Serial Interface
S
User-Programmable
AUX
Input Functions
CLR,
Clear to 0, Midscale, or Full Scale
LDAC,
Asynchronous Load DAC
S
256kI Reference Input Resistance for Low-Power
Operation
S
Buffered Voltage Output Directly Drives 10kI
Loads
S
Output Power-Down Terminated with 1kI or
100kI to Ground or Left High Impedance
Ordering Information
appears at end of data sheet.
µMAX is a registered trademark of Maxim Integrated Products, Inc.
Features
S
Low-Power Consumption (80µA, max)
Applications
Remote Sensing
Portable Instrumentation
Communication Systems
Automatic Tuning
Gain and Offset
Adjustment
Power Amplifier Control
Automatic Test Equipment
Process Control and
Servo Loops
Data Acquisition
Programmable Voltage
and Current Sources
Functional Block Diagram
V
DD
REF
POR
ADDR
SCL
SDA
I
2
C SERIAL
INTERFACE
CODE
REGISTER
DAC
REGISTER
14-/16-BIT
DAC
BUFFER
OUT
MAX5215
MAX5217
GND
(
) FOR AUX CONFIGURED AS CLR
AUX = CLR /LDAC
100kI
1kI
For related parts and recommended products to use with this part, refer to:
www.maximintegrated.com/MAX5215.related
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-6469; Rev 0; 11/12
MAX5215/MAX5217
14-/16-Bit, Low-Power, Buffered Output,
Rail-to-Rail DACs with I
2
C Interface
ABSOLUTE MAXIMUM RATINGS
V
DD
to GND.............................................................-0.3V to +6V
ADDR, REF, OUT,
AUX
to GND .......-0.3V to the lower of (V
DD
+ 0.3V) and +6V
SCL, SDA, to GND ..................................................-0.3V to +6V
Continuous Power Dissipation (T
A
= +70NC)
FMAX
(derate at 4.8mW/NC above 70NC)....................387mW
Maximum Current into Any Input or Output ....................
Q50mA
Operating Temperature Range ........................ -40NC to +105NC
Storage Temperature Range............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
FMAX
Junction-to-Ambient Thermal Resistance (B
JA
) ........206NC/W
Junction-to-Case Thermal Resistance (B
JC
) ...............42NC/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(V
DD
= 2.7V to 5.5V, V
REF
= 2.5V to V
DD
, C
L
= 60pF, R
L
= 10kI, T
A
= -40NC to 105NC, unless otherwise noted. Typical values are
at T
A
= +25NC.)(Note 2)
PARAMETER
STATIC ACCURACY (Note 3)
Resolution
N
MAX5215
MAX5217/MAX5217B
MAX5215 (14 bit) (Note 4)
Integral Nonlinearity
INL
MAX5217 (16 bit) (Note 4)
MAX5217B (16 bit) (Note 4)
Differential Nonlinearity
Offset Error
Offset-Error Drift
Gain Error
Gain Temperature Coefficient
REFERENCE INPUT
Reference-Input Voltage Range
Reference-Input Impedance
DAC OUTPUT
No load
Output Voltage Range (Note 6)
DC Output Impedance
Maxim Integrated
SYMBOL
CONDITIONS
MIN
14
16
-1
-4
-8
-1
-1
-1.25
-3
-0.06
-0.10
TYP
MAX
UNITS
Bits
Q0.4
Q1.2
Q
3
Q0.1
Q0.25
Q0.25
Q0.5
Q1.6
-0.04
-0.04
Q2
+1
+4
+8
+1
+1
+1.25
-3
0
0
LSB
mV
FV/NC
%FS
ppm FS/
NC
V
DD
256
V
DD
V
DD
- 0.2
V
DD
0.1
I
2
LSB
DNL
OE
MAX5215 (14 bit) (Note 4)
MAX5217/5217B (16 bit) (Note 4)
MAX5215/5217 (Note 5)
MAX5217B (Note 5)
MAX5215/5217 (Note 5)
MAX5217B (Note 5)
GE
V
REF
R
REF
2
200
0
0
0.2
V
kI
10kI load to GND
10kI load to V
DD
V
MAX5215/MAX5217
14-/16-Bit, Low-Power, Buffered Output,
Rail-to-Rail DACs with I
2
C Interface
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 2.7V to 5.5V, V
REF
= 2.5V to V
DD
, C
L
= 60pF, R
L
= 10kI, T
A
= -40NC to 105NC, unless otherwise noted. Typical values are
at T
A
= +25NC.)(Note 2)
PARAMETER
Maximum Capacitive Load (No
Sustained Oscillations)
Resistive Load (Note 7)
Short-Circuit Current
Power-Up Time
DYNAMIC PERFORMANCE (Note 7)
Voltage-Output Slew Rate
Voltage-Output Settling Time
Reference –3dB Bandwidth
Digital Feedthrough
DAC Glitch Impulse
Output Noise
Integrated Output Noise
POWER REQUIREMENTS
Supply Voltage
Supply Current
Power-Down Supply Current
Input High Voltage
Input Low Voltage
Hysteresis Voltage
Input Leakage Current
Input Capacitance (Note 7)
ADDR Pullup/Pulldown Strength
DIGITAL OUTPUT (SDA)
Output Low Voltage
V
OL
I
SINK
= 3mA
0.2
V
V
DD
I
DD
PDI
DD
V
IH
V
IL
V
HYS
I
IN
C
IN
(Note 8)
30
50
V
IN
= 0V or V
DD
0.15
Q0.1
Q1
10
90
No load; all digital inputs at 0V or V
DD
,
supply current only; excludes reference
input current.
No load, all digital inputs at 0V or V
DD
0.7 x V
DD
0.3 x V
DD
2.7
70
0.4
5.5
80
2
V
FA
FA
V
V
V
FA
pF
kI
BW
SR
Positive and negative
¼ scale to ¾ scale, to
Q0.5
LSB, 14 bit.
Hex code = 2000 (MAX5215),
Hex code = 8000 (MAX5217)
Code = 0, all digital inputs from 0V to
V
DD
, SCL < 400kHz
Major code transition
1kHz
10kHz
0.1Hz to 10Hz
0.5
18
100
1.0
5
73
70
3.5
V/Fs
Fs
kHz
nV·s
nV·s
nV/√Hz
FV
P-P
SYMBOL
C
L
R
L
V
DD
= 5.5V
From power-down mode
CONDITIONS
Series resistance = 0I
Series resistance = 1kI
5
-25
Q6
25
+25
MIN
TYP
0.1
15
MAX
UNITS
nF
FF
kI
mA
Fs
DIGITAL INPUTS (SCL, SDA,
AUX,
ADDR )
Maxim Integrated
3
MAX5215/MAX5217
14-/16-Bit, Low-Power, Buffered Output,
Rail-to-Rail DACs with I
2
C Interface
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 2.7V to 5.5V, V
REF
= 2.5V to V
DD
, C
L
= 60pF, R
L
= 10kI, T
A
= -40NC to 105NC, unless otherwise noted. Typical values are
at T
A
= +25NC.)(Note 2)
PARAMETER
TIMING CHARACTERISTICS
SCL Clock Frequency
sBus Free Time Between a STOP
and a START Condition
Hold Time for a Repeated START
Condition
SCL Pulse Width Low
SCL Pulse Width High
Setup Time for Repeated START
Condition
Data Hold Time
Data Setup Time
SDA and SCL Receiving Rise Time
SDA and SCL Receiving Fall Time
SDA Transmitting Fall Time
Setup Time for STOP Condition
Bus Capacitance Allowed
Pulse Width of Suppressed Spike
CLR
Removal Time Prior to a
Recognized START
CLR
Pulse Width Low
LDAC
Pulse Width Low
SCLK Rise to
LDAC
Fall Hold
f
SCL
t
BUF
t
HD;STA
t
LOW
t
HIGH
t
SU;STA
t
HD;DAT
t
SU;DAT
tr
tf
tf
t
SU;STO
C
B
t
SP
t
CLRSTA
t
CLPW
t
LDPW
t
LDH
Applies to execution edge
100
20
20
400
V
DD
= 2.7V to 5.5V
1.3
0.6
1.3
0.6
0.6
0
100
20 + C
B
/10
20 + C
B
/10
20 + C
B
/10
0.6
10
50
400
300
300
250
900
400
kHz
Fs
Fs
Fs
Fs
Fs
ns
ns
ns
ns
ns
Fs
pF
ns
ns
ns
ns
ns
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Note 2:
Electrical specifications are production tested at T
A
= +25°C and T
A
= +105°C. Specifications over the entire operating
temperature range are guaranteed by design and characterization. Typical specifications are at T
A
= +25°C and are not
guaranteed.
Note 3:
Static accuracy tested without load.
Note 4:
Linearity is tested within 20mV of GND and V
DD
.
Note 5:
Gain and offset is tested within 20mV of GND and V
DD
.
Note 6:
Subject to offset and gain error limits and V
REF
settings.
Note 7:
Specification is guaranteed by design and characterization.
Note 8:
Unconnected conditions on the ADDR_ inputs are sensed through a resistive pullup and pulldown operation; for proper
operation, the ADDR_ inputs must be connected to V
DD
, GND, or left unconnected with minimal capacitance.
This is Part 3 over 6 of “Coding for SSDs”, covering Sections 3 and 4. For other parts and sections, you can refer to the Table to Contents. This is a series of articles that I w ......
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