74VHCT16245A
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS (NON INVERTED)
s
s
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 4.5 ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 4
µA
(MAX.) at T
A
=25°C
COMPATIBLE WITH TTL OUTPUTS:
V
IH
= 2V (MIN.), V
IL
= 0.8V (MAX)
POWER DOWN PROTECTION ON INPUTS
& OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8 mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
≅
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: V
OLP
= 0.9V (MAX.)
TSSOP
ORDER CODES
PACKAGE
TSSOP
PIN CONNECTION
bs
O
DESCRIPTION
The 74VHCT16245A is an advanced high-speed
CMOS 16-BIT BUS TRANSCEIVER (3-STATE)
fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS technology.
This IC is intended for two-way asynchronous
communication between data busses; the
direction of data transmission is determined by
DIR input. The enable input G can be used to
disable the device so that the busses are
effectively isolated.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
All floating bus terminals during High Z State must
be held HIGH or LOW.
et
l
o
ro
P
e
uc
d
s)
t(
O
-
so
b
te
le
ro
P
TUBE
uc
d
s)
t(
T&R
74VHCT16245ATTR
July 2003
1/10
74VCHT16245A
INPUT EQUIVALENT CIRCUIT
IEC LOGIC SYMBOLS
PIN DESCRIPTION
PIN No
1
2, 3, 5, 6, 8, 9,
11, 12
13, 14, 16, 17,
19, 20, 22, 23
24
25
36, 35, 33, 32,
30, 29, 27, 26
47, 46, 44, 43,
41, 40, 38, 38
48
4, 10, 15, 21,
28, 34, 39, 45
7, 18, 31, 42
SYMBOL
NAME AND FUNCTION
1DIR
Directional Control
1B1 to 1B8 Data Inputs/Outputs
2B1 to 2B8 Data Inputs/Outputs
2DIR
Directional Control
2G
Output Enable Input
2A1 to 2A8 Data Inputs/Outputs
1A1 to 1A8 Data Inputs/Outputs
1G
GND
V
CC
Output Enable Input
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
INPUTS
b
O
X : Don‘t Care
Z : High Impedance
et
l
so
L
L
H
G
DIR
L
H
X
ro
P
e
A BUS
uc
d
s)
t(
O
-
so
b
te
le
ro
P
uc
d
s)
t(
FUNCTION
B BUS
OUTPUT
Yn
A=B
B=A
Z
OUTPUT
INPUT
INPUT
OUTPUT
Z
Z
2/10
74VCHT16245A
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
I/O
V
I/O
I
IK
I
OK
I
O
Supply Voltage
DC Input Voltage (DIR, G)
DC BUS I/O Voltage (see note 1)
DC BUS I/O Voltage (see note 2)
DC Input Diode Current
DC Output Diode Current
DC Output Current
Parameter
Value
-0.5 to +7.0
-0.5 to +7.0
-0.5 to +7.0
-0.5 to V
CC
+ 0.5
- 20
±
20
±
25
±
75
-65 to +150
300
Unit
V
V
V
V
mA
mA
mA
I
CC
or I
GND
DC V
CC
or Ground Current
Storage Temperature
T
stg
T
L
Lead Temperature (10 sec)
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) Output in OFF State
2) High or Low State
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
I/O
V
I/O
T
op
dt/dv
Supply Voltage
Input Voltage
BUS I/O Voltage (see note 1)
BUS I/O Voltage (see note 2)
Operating Temperature
Parameter
Input Rise and Fall Time (see note 3) (V
CC
= 5.0
±
0.5V)
1) Output in OFF State
2) High or Low State
3) VIN from 0.8V to 2V
bs
O
et
l
o
ro
P
e
uc
d
)-
(s
t
b
O
so
te
le
r
P
du
o
Value
ct
s)
(
mA
°C
°C
Unit
V
V
V
V
°C
ns/V
4.5 to 5.5
0 to 5.5
0 to 5.5
0 to V
CC
-55 to 125
0 to 20
3/10
74VCHT16245A
DC SPECIFICATIONS
Test Condition
Symbol
Parameter
V
CC
(V)
4.5 to
5.5
4.5 to
5.5
4.5
4.5
4.5
4.5
5.5
0 to
5.5
5.5
5.5
0
I
O
=-50
µA
I
O
=-8 mA
I
O
=50
µA
I
O
=8 mA
V
I
= V
IH
or V
IL
V
O
= 0V to 5.5V
V
I
= 5.5V or GND
V
I
= V
CC
or GND
One Input at 3.4V,
other input at V
CC
or GND
V
OUT
= 5.5V
T
A
= 25°C
Min.
2
0.8
4.4
3.94
0.0
0.1
0.36
±0.25
±
0.1
4.5
4.4
3.8
0.1
0.44
Typ.
Max.
Value
-40 to 85°C
Min.
2
0.8
4.4
3.7
Max.
-55 to 125°C
Min.
2
0.8
Max.
V
V
V
Unit
V
IH
V
IL
V
OH
V
OL
Ioz
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
Low Level Output
Voltage
High Impedance
Output Leakage
Current
Input Leakage
Current
Quiescent Supply
Current
Additional Worst
Case Supply
Current
Output Leakage
Current
±
2.5
I
I
I
CC
I
CC
I
OPD
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3ns)
Symbol
Parameter
t
PLH
t
PHL
bs
O
t
PZL
t
PZH
t
PLZ
t
PHZ
et
l
o
Propagation Delay
Time
Output Enable
Time
Output Disable
Time
Output to Output
Skew Time (note 1)
r
P
e
od
V
CC
(*)
C
L
(V)
(pF)
5.0
5.0
5.0
5.0
5.0
5.0
15
50
15
50
50
50
RL = 1K
Ω
RL = 1K
Ω
uc
Test Condition
T
A
= 25°C
Min.
Typ.
4.5
5.3
9.0
9.7
10.0
Max.
7.5
8.7
13.8
14.8
15.4
1.0
s)
t(
O
-
s
b
te
le
o
4
1.35
0.5
ro
P
40
±
1.0
uc
d
s)
t(
0.1
0.55
±
2.5
±
1.0
40
1.5
5.0
V
µA
µA
µA
mA
µA
t
OSLH
t
OSHL
(*) Voltage range is 5.0V
±
0.5V
Note 1: Parameter guaranteed by design. t
soLH
= |t
pLHm
- t
pLHn
|, t
soHL
= |t
pHLm
- t
pHLn
|
4/10
+
1.5
5.0
Value
-40 to 85°C
Min.
1.0
1.0
1.0
1.0
1.0
Max.
8.5
9.5
15.0
16.0
16.5
1.0
-55 to 125°C
Min.
1.0
1.0
1.0
1.0
1.0
Max.
10.0
11.0
16.0
17.0
17.5
1.0
ns
ns
ns
ns
Unit
74VCHT16245A
CAPACITIVE CHARACTERISTICS
Test Condition
Symbol
Parameter
Min.
C
IN
C
I/O
C
PD
Input Capacitance
Bus Input
Capacitance
Power Dissipation
Capacitance
(note 1)
T
A
= 25°C
Typ.
6
8
18
Max.
10
Value
-40 to 85°C
Min.
Max.
10
-55 to 125°C
Min.
Max.
10
pF
pF
pF
Unit
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/8 (per circuit)
DYNAMIC SWITCHING CHARACTERISTICS
Test Condition
Symbol
Parameter
V
CC
(V)
5.0
T
A
= 25°C
Min.
Typ.
0.6
Value
-40 to 85°C
Min.
Max.
V
OLP
V
OLV
V
IHD
V
ILD
Dynamic Low
Voltage Quiet
Output (note 1, 2)
Dynamic High
Voltage Input
(note 1, 3)
Dynamic Low
Voltage Input
(note 1, 3)
5.0
5.0
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.0V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.0V. Inputs under test switching: 3.0V to threshold (V
ILD
), 0V to threshold
(V
IHD
), f=1MHz.
bs
O
et
l
o
ro
P
e
uc
d
)-
(s
t
C
L
= 50 pF
b
O
2.0
-0.9
so
-0.6
te
le
Max.
0.9
0.8
ro
P
uc
d
Min.
s)
t(
Max.
-55 to 125°C
Unit
V
5/10
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