NLU1GT14
Single Schmitt-Trigger
Inverter, TTL Level
LSTTL−Compatible Inputs
The NLU1GT14 MiniGatet is an advanced high−speed CMOS
Schmitt−trigger inverter in ultra−small footprint.
The device input is compatible with TTL−type input thresholds and
the output has a full 5 V CMOS level output swing.
The NLU1GT14 input and output structures provide protection
when voltages up to 7 V are applied, regardless of the supply voltage.
The NLU1GT14 can be used to enhance noise immunity or to
square up slowly changing waveforms.
Features
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MARKING
DIAGRAMS
UDFN6
MU SUFFIX
CASE 517AA
MM
1
•
•
•
•
•
•
•
•
•
High Speed: t
PD
= 4.5 ns (Typ) @ V
CC
= 5.0 V
Low Power Dissipation: I
CC
= 1
mA
(Max) at T
A
= 25°C
TTL−Compatible Input: V
IL
= 0.8 V; V
IH
= 2.0 V
CMOS−Compatible Output:
V
OH
> 0.8 V
CC
; V
OL
< 0.1 V
CC
@ Load
Power Down Protection Provided on inputs
Balanced Propagation Delays
Overvoltage Tolerant (OVT) Input and Output Pins
Ultra−Small Packages
These are Pb−Free Devices
1
ULLGA6
1.0 x 1.0
CASE 613AD
MM
1
ULLGA6
1.2 x 1.0
CASE 613AE
MM
1
ULLGA6
1.45 x 1.0
CASE 613AF
MM
NC
1
6
V
CC
1
UDFN6
1.0 x 1.0
CASE 517BX
TM
IN A
2
5
NC
UDFN6
1.45 x 1.0
CASE 517AQ
1
M
M
= Device Marking
= Date Code
QM
GND
3
4
OUT Y
Figure 1. Pinout
(Top View)
1
IN A
OUT Y
PIN ASSIGNMENT
1
2
3
4
5
6
NC
IN A
GND
OUT Y
NC
V
CC
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
Figure 2. Logic Symbol
FUNCTION TABLE
A
L
H
Y
H
L
©
Semiconductor Components Industries, LLC, 2013
May, 2013
−
Rev. 4
1
Publication Order Number:
NLU1GT14/D
NLU1GT14
MAXIMUM RATINGS
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
O
I
CC
I
GND
T
STG
T
L
T
J
MSL
F
R
V
ESD
DC Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Source/Sink Current
DC Supply Current Per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature Range
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature Under Bias
Moisture Sensitivity
Flammability Rating Oxygen
ESD Withstand Voltage
Index: 28 to 34
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
V
IN
< GND
V
OUT
< GND
Parameter
Value
−0.5
to +7.0
−0.5
to +7.0
−0.5
to +7.0
−20
±20
±12.5
±25
±25
−65
to +150
260
150
Level 1
UL 94 V−0 @ 0.125 in
> 2000
> 150
N/A
±500
V
Unit
V
V
V
mA
mA
mA
mA
mA
°C
°C
°C
I
LATCHUP
Latchup Performance Above V
CC
and Below GND at 125°C (Note 5)
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow.
2. Tested to EIA / JESD22−A114−A.
3. Tested to EIA / JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA / JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
V
OUT
T
A
Dt/DV
Positive DC Supply Voltage
Digital Input Voltage
Output Voltage
Operating Free−Air Temperature
Input Transition Rise or Fall Rate
V
CC
= 3.3 V
±
0.3 V
V
CC
= 5.0 V
±
0.5 V
Parameter
Min
1.65
0
0
−55
0
0
Max
5.5
5.5
5.5
+125
No Limit
No Limit
Unit
V
V
V
°C
ns/V
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2
NLU1GT14
DC ELECTRICAL CHARACTERISTICS
V
CC
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
V
IN
v
V
T−MIN
I
OH
=
−50
mA
V
IN
v
V
T−MIN
I
OH
=
−4
mA
I
OH
=
−8
mA
V
OL
Maximum Low−Level
Output Voltage
V
IN
w
V
T+MAX
I
OL
= 50
mA
V
IN
w
V
T+MAX
I
OL
= 4 mA
I
OL
= 8 mA
I
IN
I
CC
I
CCT
I
OPD
Input Leakage Current
Quiescent Supply
Current
Quiescent Supply
Current
Output Leakage Current
0
v
V
IN
v
5.5 V
V
IN
= 5.5 V or
GND
V
IN
= 3.4 V
V
OUT
= 5.5 V
2.0
3.0
4.5
3.0
4.5
2.0
3.0
4.5
3.0
4.5
0 to
5.5
5.5
5.5
0.0
T
A
= 25
5C
Min
1.20
1.58
1.79
0.35
0.5
0.6
0.30
0.40
0.50
1.9
2.9
4.4
2.58
3.94
0
0
0
0.1
0.1
0.1
0.36
0.36
±0.1
1.0
1.35
0.5
Typ
1.40
1.74
1.94
0.76
1.01
1.13
0.64
0.73
0.81
2.0
3.0
4.5
Max
1.60
2.00
2.10
0.93
1.18
1.29
1.20
1.40
1.60
0.35
0.5
0.6
0.30
0.40
0.50
1.9
2.9
4.4
2.48
3.80
0.1
0.1
0.1
0.44
0.44
±1.0
20
1.50
5.0
1.20
1.40
1.60
T
A
=
+855C
Min
Max
1.6
2.0
2.0
0.35
0.5
0.6
0.30
0.40
0.50
1.9
2.9
4.4
2.34
3.66
0.1
0.1
0.1
0.52
0.52
±1.0
40
1.65
10
mA
mA
mA
mA
V
1.20
1.40
1.60
T
A
=
−555C
to +1255C
Min
Max
1.6
2.0
2.0
Unit
V
Symbol
V
T+
Parameter
Positive Threshold
Voltage
Negative Threshold
Voltage
Hysteresis Voltage
Conditions
V
T−
V
V
H
V
V
OH
Minimum High−Level
Output Voltage
V
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3.0 ns)
V
CC
(V)
3.0 to
3.6
4.5 to
5.5
C
IN
C
PD
Input Capacitance
Power Dissipation
Capacitance
(Note 6)
5.0
Test
Condition
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
T
A
= 25
5C
Min
Typ
7.0
8.4
4.5
5.8
5
10.0
Max
12.8
16.3
8.6
10.6
10
T
A
=
+855C
Min
1.0
1.0
1.0
1.0
Max
15.0
18.5
10.0
12.0
10
T
A
=
−555C
to
+1255C
Min
1.0
1.0
1.0
1.0
Max
17.0
20.5
11.5
13.5
10.0
pF
pF
Unit
ns
Symbol
t
PLH
,
t
PHL
Parameter
Propagation Delay,
Input A to Output Y
6. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the dynamic operating current consumption without
load. Average operating current can be obtained by the equation I
CC(OPR)
= C
PD
•
V
CC
•
f
in
+ I
CC
. C
PD
is used to determine the no−load
dynamic power consumption: P
D
= C
PD
•
V
CC2
•
f
in
+ I
CC
•
V
CC.
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3
NLU1GT14
A or B
V
CC
50%
t
PLH
Y
50% V
CC
*Includes all probe and jig capacitance.
A 1−MHz square input wave is recommended for propagation delay tests.
t
PHL
GND
INPUT
C
L*
OUTPUT
Figure 3. Switching Waveforms
Figure 4. Test Circuit
V
H
V
IN
V
CC
V
T+
V
T−
GND
V
OH
V
IN
V
H
V
CC
V
T+
V
T−
GND
V
OH
V
OUT
V
OL
V
out
V
OL
(b) A Schmitt−Trigger Offers Maximum Noise Immunity
(a) A Schmitt−Trigger Squares Up Inputs With Slow Rise and Fall Times
Figure 5. Typical Schmitt−Trigger Applications
ORDERING INFORMATION
Device
NLU1GT14MUTCG
NLU1GT14AMX1TCG
NLU1GT14BMX1TCG
NLU1GT14CMX1TCG
NLU1GT14AMUTCG
(In Development)
NLU1GT14CMUTCG
(In Development)
Package
UDFN6, 1.2 x 1.0, 0.4P
(Pb−Free)
ULLGA6, 1.45 x 1.0, 0.5P
(Pb−Free)
ULLGA6, 1.2 x 1.0, 0.4P
(Pb−Free)
ULLGA6, 1.0 x 1.0, 0.35P
(Pb−Free)
UDFN6, 1.45 x 1.0, 0.5P
(Pb−Free)
UDFN6, 1.0 x 1.0, 0.35P
(Pb−Free)
Shipping
†
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
NLU1GT14
PACKAGE DIMENSIONS
UDFN6 1.45x1.0, 0.5P
CASE 517AQ
ISSUE O
D
A
B
L1
PIN ONE
REFERENCE
L
L
E
OPTIONAL
CONSTRUCTIONS
DETAIL A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
DIM
A
A1
A2
b
D
E
e
L
L1
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.07 REF
0.20
0.30
1.45 BSC
1.00 BSC
0.50 BSC
0.30
0.40
−−−
0.15
0.10 C
0.10 C
DETAIL B
0.05 C
6X
A
A1
SIDE VIEW
e
1
3
OPTIONAL
CONSTRUCTIONS
0.05 C
A2
C
SEATING
PLANE
6X
L
DETAIL A
6
4
6X
b
0.10 C A B
0.05 C
NOTE 3
BOTTOM VIEW
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5
ÉÉ
ÉÉ
ÉÉÉ
ÉÉÉ
TOP VIEW
EXPOSED Cu
MOLD CMPD
DETAIL B
MOUNTING FOOTPRINT
PACKAGE
OUTLINE
0.30
6X
1.24
0.53
6X
1
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
嵌入式系统
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