- 1-2 Cell Li+/LiP Battery Pack for Portable Devices
S
1
S
2
7 6
S
2
Pin 1 Identifier
S
2
8 5
S
2
Device Marking:
8900E = P/N Code
xxx = Date/Lot Traceability Code
G
1
4 kΩ
8900E
xxx
G
2
9
4
G
1
4 kΩ
S
1
10 3
S
1
G
2
S
1
1 2
S
1
Ordering Information:
Si8900EDB-T2-E1 (Lead (Pb)-free)
N-Channel
S
2
ABSOLUTE MAXIMUM RATINGS
T
A
= 25 °C, unless otherwise noted
Parameter
Source1- Source2 Voltage
Gate-Source Voltage
Continuous Source1- Source2 Current (T
J
= 150 °C)
a
Pulsed Source1- Source2 Current
Maximum Power Dissipation
a
Operating Junction and Storage Temperature Range
Package Reflow Conditions
c
IR/Convection
T
A
= 25 °C
T
A
= 85 °C
T
A
= 25 °C
T
A
= 85 °C
Symbol
V
S1S2
V
GS
I
S1S2
I
SM
P
D
T
J
, T
stg
1.8
0.9
- 55 to 150
260
7
5.1
50
1
0.5
W
°C
5s
20
± 12
5.4
3.9
A
Steady State
Unit
V
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambient
a
b
Symbol
t
≤
5s
Steady State
R
thJA
R
thJF
Typical
55
95
12
Maximum
70
120
15
Unit
°C/W
Steady State
Maximum Junction-to-Foot
Notes:
a. Surface Mounted on 1" x 1" FR4 board.
b. The foot is defined as the top surface of the package.
c. Refer to IPC/JEDEC (J-STD-020C), no manual or hand soldering.
Document Number: 71830
S-82119-Rev. G, 08-Sep-08
www.vishay.com
1
Si8900EDB
Vishay Siliconix
SPECIFICATIONS
T
J
= 25 °C, unless otherwise noted
Parameter
Static
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
a
V
GS(th)
I
GSS
I
S1S2
I
S(on)
V
SS
= V
GS
, I
D
= 1.1 mA
V
SS
= 0 V, V
GS
= ± 4.5 V
V
SS
= 0 V, V
GS
= ± 12 V
V
SS
= 20 V, V
GS
= 0 V
V
SS
= 20 V, V
GS
= 0 V, T
J
= 85 °C
V
SS
= 5 V, V
GS
= 4.5 V
V
GS
= 4.5 V, I
SS
= 1 A
Source1- Source2 On State Resistance
a
R
S1S2(on)
V
GS
= 3.7 V, I
SS
= 1 A
V
GS
= 2.5 V, I
SS
= 1 A
V
GS
= 1.8 V, I
SS
= 1 A
Forward Transconductance
a
Dynamic
b
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
t
d(on)
t
r
t
d(off)
t
f
V
SS
= 10 V, R
L
= 10
Ω
I
SS
≅
1 A, V
GEN
= 4.5 V, R
g
= 6
Ω
3
4.5
55
15
5
7
85
25
µs
g
fs
V
SS
= 10 V, I
SS
= 1 A
5
0.020
0.022
0.026
0.032
31
0.024
0.026
0.034
0.040
S
Ω
0.45
1.0
±4
± 10
1
5
V
µA
mA
µA
A
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Notes:
a. Pulse test; pulse width
≤
300 µs, duty cycle
≤
2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
1. Laser mark on the silicon die back, coated with a thin metal.
2. Bumps are 95.5Sn/3.8Ag/0.7Cu.
3. Non-solder mask defined copper landing pad.
Millimeters
a
Min.
0.600
0.260
0.340
0.370
4.050
1.980
0.750
0.430
0.580
Max.
0.650
0.290
0.360
0.410
4.060
2.000
0.850
0.450
0.600
Min.
0.0236
0.102
0.0134
0.0146
0.1594
0.0780
0.0295
0.0169
0.0228
Dim.
A
A
1
A
2
b
D
E
e
S
1
S
2
Inches
Max.
0.0256
0.0114
0.0142
0.0161
0.1598
0.0787
0.0335
0.0177
0.0236
Notes:
a. Use millimeters as the primary measurement.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
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