74ACT373
OCTAL D-TYPE LATCH
WITH 3 STATE OUTPUTS (NON INVERTED)
s
s
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 6ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 4µA(MAX.) at T
A
=25°C
COMPATIBLE WITH TTL OUTPUTS
V
IH
= 2V (MIN.), V
IL
= 0.8V (MAX.)
50Ω TRANSMISSION LINE DRIVING
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
≅
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 373
IMPROVED LATCH-UP IMMUNITY
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
DIP
SOP
TSSOP
TUBE
74ACT373B
74ACT373M
T&R
DESCRIPTION
The 74ACT373 is a high-speed CMOS OCTAL
D-TYPE LATCH with 3 STATE OUTPUT NON
INVERTING fabricated with sub-micron silicon
gate and double-layer metal wiring C
2
MOS
technology.
These 8 bit D-Type latch are controlled by a latch
enable input (LE) and an output enable input (OE).
When the (LE) input is high , the Q outputs follow
the data (D) inputs . When the (LE) is taken low,
the Q outputs will be latched at the logic levels set
PIN CONNECTION AND IEC LOGIC SYMBOLS
O
so
b
te
le
r
P
uc
od
s)
t(
bs
-O
up at the D inputs. When the (OE) input is low, the
8 outputs will be in a normal logic state (high or
low logic level); when the (OE) input is high, the
outputs will be in a high impedance state.
This device is designed to interface directly High
Speed CMOS systems with TTL and NMOS
components.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
et
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74ACT373MTR
74ACT373TTR
s)
t(
uc
April 2001
1/11
74ACT373
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
T
stg
T
L
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
Storage Temperature
Lead Temperature (10 sec)
Parameter
Value
-0.5 to +7
-0.5 to V
CC
+ 0.5
-0.5 to V
CC
+ 0.5
±
20
±
20
±
50
±
400
-65 to +150
300
Unit
V
V
V
mA
mA
mA
mA
°C
°C
I
CC
or I
GND
DC V
CC
or Ground Current
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
T
op
dt/dv
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Input Rise and Fall Time V
CC
= 4.5 to 5.5V (note 1)
Parameter
Value
4.5 to 5.5
0 to V
CC
0 to V
CC
1) V
IN
from 0.8V to 2.0V
O
so
b
te
le
r
P
uc
od
s)
t(
bs
-O
l
o
te
e
-55 to 125
8
r
P
od
s)
t(
uc
Unit
V
V
V
°C
ns/V
3/11
74ACT373
DC SPECIFICATIONS
Test Condition
Symbol
Parameter
V
CC
(V)
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
V
OL
Low Level Output
Voltage
4.5
5.5
4.5
5.5
I
I
I
OZ
Input Leakage Cur-
rent
High Impedance
Output Leakege
Current
Max I
CC
/Input
Quiescent Supply
Current
Dynamic Output
Current (note 1, 2)
5.5
5.5
5.5
5.5
5.5
V
O
= 0.1 V or
V
CC
-0.1V
V
O
= 0.1 V or
V
CC
-0.1V
I
O
=-50
µA
I
O
=-50
µA
I
O
=-24 mA
I
O
=-24 mA
I
O
=50
µA
I
O
=50
µA
I
O
=24 mA
I
O
=24 mA
V
I
= V
CC
or GND
V
I
= V
IH
or V
IL
V
O
= V
CC
or GND
V
I
= V
CC
- 2.1V
V
I
= V
CC
or GND
V
OLD
= 1.65 V max
V
OHD
= 3.85 V min
0.6
4.4
5.4
3.86
4.86
0.001
0.001
0.1
0.1
0.36
0.36
±
0.1
±
0.5
T
A
= 25°C
Min.
2.0
2.0
Typ.
1.5
1.5
1.5
1.5
4.49
5.49
Max.
Value
-40 to 85°C
Min.
2.0
2.0
0.8
0.8
4.4
5.4
3.76
4.76
0.1
0.1
0.44
0.44
±
1
0.8
0.8
4.4
5.4
3.7
4.7
0.1
0.1
0.5
0.5
Max.
-55 to 125°C
Min.
2.0
2.0
0.8
0.8
V
Max.
V
Unit
V
IH
V
IL
V
OH
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
±
5
I
CCT
I
CC
I
OLD
I
OHD
1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on trasmission lines with impedances as low as 50Ω
AC ELECTRICAL CHARACTERISTICS
(C
L
= 50 pF, R
L
= 500
Ω,
Input t
r
= t
f
= 3ns)
Symbol
Parameter
b
O
so
te
le
t
PLH
t
PHL
Propagation Delay
Time LE to Q
t
PLH
t
PHL
Propagation Delay
Time D to Q
t
PZL
t
PZH
Output Enable
Time
t
PLZ
t
PHZ
Output Disable
Time
t
W
LE Minimum Pulse
Width, HIGH
t
s
Setup Time D to
LE, HIGH or LOW
t
h
Hold Time D to LE,
HIGH or LOW
r
P
uc
od
V
CC
(V)
5.0
(*)
5.0
(*)
5.0
(*)
5.0
(*)
5.0
(*)
5.0
(*)
5.0
(*)
Test Condition
T
A
= 25°C
Min.
Typ.
5.5
6.0
6.0
7.0
1.3
-0.5
0.5
Max.
10.0
10.0
9.5
11.0
7.0
7.0
0.0
s)
t(
bs
-O
l
o
4
te
e
Value
1.5
40
75
r
P
od
80
50
±
1
s)
t(
uc
V
µA
µA
mA
µA
mA
mA
±
5
1.6
-75
-50
-40 to 85°C
Min.
Max.
11.5
11.5
10.5
12.5
8.0
8.0
1.0
-55 to 125°C
Min.
Max.
11.5
11.5
10.5
12.5
8.0
8.0
1.0
Unit
ns
ns
ns
ns
ns
ns
ns
(*) Voltage range is 5.0V
±
0.5V
4/11
74ACT373
CAPACITIVE CHARACTERISTICS
Test Condition
Symbol
Parameter
V
CC
(V)
5.0
5.0
5.0
f
IN
= 10MHz
T
A
= 25°C
Min.
Typ.
4
8
25
Max.
Value
-40 to 85°C
Min.
Max.
-55 to 125°C
Min.
Max.
pF
pF
pF
Unit
C
IN
C
OUT
C
PD
Input Capacitance
Output
Capacitance
Power Dissipation
Capacitance (note
1)
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/n (per circuit)
TEST CIRCUIT
TEST
t
PLH
, t
PHL
t
PZL
, t
PLZ
t
PZH
, t
PHZ
C
L
= 50pF or equivalent (includes jig and probe capacitance)
R
L
= R
1
= 500Ω or equivalent
R
T
= Z
OUT
of pulse generator (typically 50Ω)
O
so
b
te
le
r
P
uc
od
s)
t(
bs
-O
et
l
o
P
e
od
r
s)
t(
uc
SWITCH
Open
2V
CC
Open
5/11
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