Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum (–40_ to 85_C).
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing and are measured at V
CC
= 12 V unless otherwise noted.
PIN CONFIGURATION
TSSOP-16
1
2
3
4
5
6
7
8
Top View
16
15
14
13
12
11
10
9
C
2
NC
E
2
NC
NC
E
1
NC
C
1
V
CC
FAULT
C
DEL
NC
GND
IN
2B
IN
2A
IN
1
TSSOP 16
ORDERING INFORMATION
Standard
Part Number
SiP43101DQ-T1
Lead (Pb)-Free
Part Number
SiP43101DQ-T1—E3
Temperature
Range
–40 to 85_C
Marking
43101
PowerPAK MLP-44
C
2
13
NC
14
V
CC
FAULT
15
16
E
2
NC
NC
E
1
12
11
10
9
1
2
3
4
C
DEL
GND
NC
IN
2B
PowerPAK MLP 44
ORDERING INFORMATION
Standard
Part Number
SiP43101DLP-T1
Lead (Pb)-Free
Part Number
SiP43101DLP-T1–E3
Temperature
Range
–40 to 85_C
Marking
43101
8
C
1
7
NC
6
IN
1
5
IN
2A
Bottom View
Document Number: 72640
S-51493, Rev. D—15-Aug-05
www.vishay.com
3
SiP43101
Vishay Siliconix
PIN DESCRIPTION
Pin Number
TSSOP-16
1
2
3
4, 10, 12, 13,
15
5
6
7
8
9
11
14
16
MLP44-16
15
16
1
3, 7, 10, 11, 14
2
4
5
6
8
9
12
13
Name
V
CC
FAULT
C
DEL
NC
GND
IN
2B
IN
2A
IN
1
C
1
E
1
E
2
C
2
Positive Supply Voltage
Function
Open collector output that is switched low on in the event of Short Circuit or Thermal Shut Down.
Connection for the external capacitor controlling the turn on delay.
No connection
Ground Pin.
Input to the Exclusive OR controlling power switch 2.
Input to the Exclusive OR controlling power switch 2.
Input controlling power switch 1.
Collector of power switch 1.
Emitter of power switch 1.
Emitter of power switch 2.
Collector of power switch 2.
DETAILED PIN DESCRIPTION
C
DEL
A capacitor connected to this pin is used to set the duration
the turn on delay. The delay starts after the UVLO threshold
has been reached.
E
1
This pin is the emitter of Switch 1. This pin is connected to the
load in the High-Side Switch configuration, and is connected
to Ground in the Low-Side configuration.
E
2
IN
1
This pin controls the state of the output NPN switch 1. A
Logic 0 holds the switch off while a Logic 1 turns the switch on.
This pin is the emitter of switch 2. This pin is connected to the
load in the High-Side switch configuration, and is connected
to Ground in the Low-Side configuration.
C
1
IN
2A
, IN
2B
These pins are the inputs to the Exclusive OR gate that
controls the state of the output NPN switch 2. This allows the
use of either a non-inverting or an inverted signal to control the
switch. Refer to the truth table for the logic function
description.
This pin is the collector of switch 1. This pin is connected to the
V
CC
in the High-Side switch configuration, and is connected
to the load in the Low-Side configuration.
C
2
This pin is the collector of switch 2. This pin is connected to the
V
CC
in the High-Side switch configuration, and is connected
to the load in the Low-Side configuration.
FAULT
This pin is an open collector output that is pulled to Ground in
the event of a short circuit, an overcurrent, or a thermal shut
down
Document Number: 72640
S-51493, Rev. D—15-Aug-05
IN
2A
Low
Low
High
High
www.vishay.com
IN
2B
Low
High
Low
High
SWITCH 2
Off
On
On
Off
4
SiP43101
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM
V
CC
Reference
C
2
C
DEL
UVLO
E
2
Reset
FAULT
Control
Logic
C
1
Short Citcuit
Thermal Shut Down
E
1
IN
2B
IN
2A
IN
1
GND
DETAILED OPERATION
Turn On Delay
The turn on delay prohibits the output switches from being
turned on for a period of time after V
CC
has passed through
8 V and the undervoltage condition no longer exists. The
UVLO function keeps the external C
DEL
capacitor discharged
until V
CC
is greater than 8 V. Subsequently, an internal 2.5-mA
current source charges the capacitor from GND to 4.7 V. A
comparator detects when the voltage on C
DEL
passes
through 4 V and enables the output switches. The delay time
is a function of the capacitor value and is defined as
1.6 ms/nF.
An external switch can be connected across the capacitor to
disable the output switches and reset the time delay.
Short Circuit and Overcurrent indication
When an overcurrent or short circuit condition occurs on
either switch, the SiP43101 enters a hiccup current limiting
mode. In this mode, the capacitor on C
DEL
is discharged
down to 3 V, thus turning off the output switches, and then is
charged up to 4 V by a 2.5-mA internal current source, thus
turning the switches on again. If the overcurrent or short circuit
condition remains this cycle will continue. The switches are
enabled at a very low duty cycle, minimizing the power
dissipation and protecting the switches from damage.
The FAULT output will switch to GND, indicating that an
overload condition or short circuit condition exists.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and
Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see
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