www.fairchildsemi.com
FAN2558/FAN2559
180mA Low Voltage CMOS LDO
Features
• Fixed 1.0V, 1.2V, 1.3V, 1.5V, 1.8V, 2.5V, 3.3V, 3.5V, 3.6V,
3.8V and Adjustable Output
• Power Good Indicator with Open Drain Output
• 180mA Output Current
• 100µA Ground Current
• C
bypass
for Low Noise Operation
• Fast Enable for CDMA Applications
• High Ripple Rejection
• Current Limit
• Thermal Shutdown
• Excellent Line and Load Regulation
• Requires Only 1µF Output Capacitor
• Stable with 0 to 300m
Ω
ESR
• TTL-level Compatible Enable Input
• Active Output Discharge
General Description
The FAN2558/9 low voltage CMOS LDOs feature
fixed
or
adjustable output voltage, 180mA load current, delayed
power good output (open drain) and 1% output accuracy
with excellent line and load regulation. An external bypass
capacitor provides ultra-low noise operation.
The FAN2558/9 low voltage LDOs incorporate both thermal
shutdown and short circuit protection. Output is stable with a
1µF, low ESR capacitor. The FAN2558/9 family is available
in 5-Lead SOT-23, 6-Lead SOT-23 and 2x2mm MLP-6
packages.
FAN2558:
Fixed Output LDO with Power Good output
FAN2558ADJ:
Adjustable Output LDO with Power Good
output
FAN2559:
Fixed Output LDO with Power Good output,
Low Noise
Available standard output voltages are 1.0, 1.2V, 1.3V, 1.5V,
1.8V, 2.5V, 3.3V, 3.5V, 3.6V, and 3.8V. Custom output volt-
age options are also available.
Applications
•
•
•
•
Processor Power-up sequencing
PDAs, Cell Phones
Portable Electronic Equipment
PCMCIA Vcc and Vpp regulation/switching
Typical Application
47KΩ
R
PG
V
IN
47KΩ
R
PG
V
IN
C
OUT
47KΩ
R
PG
VOUT
R1
ADJ
R2
PG
C
OUT
VI
N
FB
SHDN
GND
V
OUT
FB
SHDN
GND
FB
SHDN
GND
V
OUT
C
OUT
CB
YP
C BYP
PG
CAP+
CAP-
EN
PG
CAP+
CAP-
EN
CAP+
CAP-
EN
FAN2558
FAN2558ADJ
FAN2559
REV. 1.0.4 3/15/04
FAN2558/FAN2559
PRODUCT SPECIFICATIONS
Pin Assignments
TOP-VIEW
VIN 1
GND 2
EN 3
4 PG
5 VOUT
VIN 1
GND
EN
2
3
6 VOUT
5 ADJ/BYP
4 PG
FAN2558/FAN2558ADJ/FAN2559
2x2mm MLP-6 PACKAGE
VOUT
NC/ADJ/BYP
PG
1
2
3
6
5
4
VIN
GND
EN
FAN2558
5-Lead SOT-23 PACKAGE
FAN2558ADJ/FAN2559
6-Lead SOT-23 PACKAGE
Pin Name
Pin no.
1
2
3
4
5
6
V
IN
GND.
EN
PG
V
OUT
FAN2558
5SOT-23
2x2mm MLP-6
V
OUT
NC
PG
EN
GND
V
IN
V
IN
GND.
EN
PG
ADJ
V
OUT
FAN2558ADJ
6SOT-23
2x2mm MLP-6
V
OUT
ADJ
PG
EN
GND
V
IN
V
IN
GND.
EN
PG
BYP
V
OUT
FAN2559
6SOT-23
2x2mm MLP-6
V
OUT
BYP
PG
EN
GND
V
IN
Pin Descriptions
Symbol
V
IN
V
OUT
GND
PG
ADJ
BYP
EN
Power Supply Input
Regulated Voltage Output
Ground Connection
Power Good Output, Open Drain
Ratio of potential divider from V
out
to ADJ determines output voltage
Reference Noise Bypass
Chip Enable Input. The regulator is fully enabled when TTL “H” is applied to this input. The regulator
enters into shutdown mode when TTL “L” is applied to this input.
Pin Function Description
2
REV. 1.0.4 3/15/04
PRODUCT SPECIFICATIONS
FAN2558/FAN2559
Absolute Maximum Ratings
Parameter
V
IN
to GND
Voltage on any other pin to GND
Junction Temperature (T
J
)
Storage Temperature
Lead Soldering Temperature, 10 seconds
Power Dissipation (P
D
)
Electrostatic Discharge (ESD) Protection (Note1)
HBM
CDM
4
1
-0.3
-55
-65
Min.
Max.
6
V
IN
+ 0.3
150
150
300
Internally
Limited
Units
V
V
°C
°C
°C
W
kV
Recommended Operating Conditions
Parameter
Supply Voltage Range, V
IN
for V
OUT
< 2.0V
Supply Voltage Range, V
IN
for V
OUT
≥
2.0V
Load Current
Enable Input Voltage V
EN
Power Good Output Voltage Range V
PG
Junction Temperature
Thermal Resistance-Junction to Ambient SOT-23 (Note 2)
Thermal Resistance-Junction to Case, 2mm x 2mm
6-lead MLP
0
0
-40
Min.
2.7
V
OUT
+ V
DROPOUT
Typ.
Max.
5.5
5.5
180
V
IN
V
IN
125
235
75
°C/W
Units
V
V
mA
V
V
°C
Notes:
1. Using Mil Std. 883E, method 3015.7 (Human Body Model) and EIA/JESD22C101-A (Charge Device Model)
2. Junction to ambient thermal resistance,
Θ
JC
, is a strong function of PCB material, board thickness, thickness and number of
copper plains, number of via used, diameter of via used, available copper surface, and attached heat sink characteristics.
REV. 1.0.4 3/15/04
3
FAN2558/FAN2559
PRODUCT SPECIFICATIONS
Electrical Characteristics
V
IN
= V
IN
min (note 5) to 5.5V, V
EN
= V
IN
, I
LOAD
= 100
µ
A, T
A
= -40°C to +85°C, unless otherwise noted. Typical values
are at 25°C.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
V
OUT
V
OUT(ADJ)
∆
V
OUT_LNR
∆
V
OUT_LDR
I
SD
I
GND
I
LIM
T
SD
Output Voltage Accuracy
(Note 3)
Output Voltage Range
(Adjustable)
Line Regulation
Load Regulation (Note 4)
Supply Current in Shutdown
Mode
Ground Pin Current (Note 4)
Current Limit
Thermal Shutdown
Temperature
Thermal Shutdown Hysteresis
Enable Input Low
Enable Input High
Enable Input Current
Low Threshold
High Threshold
PG Output Low Voltage
PG Leakage Current
Enable Response Time
Power "ON" Delay Time
I
LOAD
= 100
µ
A
I
LOAD
= 100
µ
A
V
IN
min < V
IN
< 5.5V
I
LOAD
= 0.1mA to 150mA
V
EN
< 0.4V
PG = No Connection
I
LOAD
= 0mA, V
IN
= 5.5V
I
LOAD
= 150mA, V
IN
= 5.5V
V
OUT
= 0V
-2
1
-0.3
1
2
V
IN
0.3
%
V
%/V
%
µ
A
2.5
0.1
90
110
260
350
150
10
4
150
150
500
µ
A
mA
°C
°C
V
ENL
V
ENH
I
E
V
PG
V
PGL
I
PG
T
EN
T
ON
V
IN
= 5.5V, Shutdown
V
IN
= 5.5V, Enabled
V
ENL
≤
0.4V, V
IN
= 5.5V
V
ENH
≥
1.6V, V
IN
= 5.5V
% of V
OUT
PG ON
% of V
OUT
PG OFF
I
PG_SINK
= 100
µ
A,
Fault Condition
PG off, V
PG
=5.5V
C
OUT
= 1µF
C
BYPASS
= 10nF
C
OUT
= 1µF
C
BYPASS
= 10nF
V
ENL
≥
1.6V,
V
IN
= 0V to V
OUT
+ 1V
1
V
OUT
> 2.7V and
I
LOAD
= 180mA
400
0.02
0.01
30
300
89
1.6
0.01
0.01
0.4
V
V
µ
A
%
97
0.1
%
V
µ
A
300
500
µS
µS
D
PG
V
DROP-OUT
PG Delay time
Dropout Voltage
(For Adjustable Output
Version)
Feedback Voltage
(For Adjustable Output
Version)
5
mS
mV
V
FB_ADJ
0.59
V
Note:
3. Guaranteed ±1% output voltage accuracy parts are available on customer request.
4. Measured at constant junction temperature using low duty cycle pulse testing.
5. V
IN
min = 2.7V or (V
OUT
+ 1V), whichever is greater.
4
REV. 1.0.4 3/15/04
嵌入式系统
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