NXP Semiconductors
Data Sheet: Technical Data
K02P64M100SFA
Rev. 4, 08/2016
Kinetis K02 64 KB/128 KB Flash
100 MHz ARM® Cortex®-M4 Based Microcontroller with FPU
Ideal for low-power applications that require processing
efficiency and high peripheral integration. These devices share
the comprehensive enablement and scalability of the Kinetis
family.
This product offers:
• Run power consumption down to 117.5 µA/MHz and static
power consumption down to 2.8 µA with full state retention
and 5.7 µs wakeup. Lowest static mode down to 70 nA.
• Excellent processing efficiency, 100 MHz ARM
®
Cortex
®
-
M4-based device with floating-point unit in a tiny form factor
MK02FN128VLH10
MK02FN128VLF10
MK02FN128VFM10
MK02FN64VLH10
MK02FN64VLF10
MK02FN64VFM10
64 LQFP (LH)
10 x 10 x 1.4 Pitch 0.5
mm
48 LQFP (LF)
7 x 7 x 1.4 Pitch 0.5
mm
32 QFN (FM)
5 x 5 x 1 Pitch 0.5 mm
Performance
• 100 MHz ARM Cortex-M4 core with DSP instructions
delivering 1.25 Dhrystone MIPS per MHz
Memories and memory interfaces
• Up to 128 KB of embedded flash and 16 KB of RAM
• Preprogrammed Kinetis flashloader for one-time, in-
system factory programming
Analog modules
• One 16-bit SAR ADC (1.2 MS/s in 12bit mode)
• One 12-bit DAC
• Two analog comparators (CMP) with 6- bit DAC
• Accurate internal voltage reference (not available in
32-pin QFN package)
Communication interfaces
• One SPI module
• Two UART modules
• One I2C: Support for up to 1 Mbps operation
System peripherals
• Flexible low-power modes, multiple wake up sources
• 4-channel DMA controller
• Independent External and Software Watchdog monitor
Timers
• One 6-channel general-purpose/PWM timer
Clocks
• Two 2-channel general-purpose timers with
• Crystal oscillator: 32-40 kHz or 3-32 MHz
quadrature decoder functionality (FTM2 does not
• Three internal oscillators: 32 kHz, 4 MHz, and 48 MHz
have external pins on the 32-pin QFN or the 48-pin
• Multi-purpose clock generator with FLL
LQFP package)
• Periodic interrupt timers
Security and integrity modules
• 16-bit low-power timer
• Hardware CRC module
• Programmable delay block
• 128-bit unique identification (ID) number per chip
• Flash access control to protect proprietary software
Operating Characteristics
• Voltage range (including flash writes): 1.71 to 3.6 V
Human-machine interface
• Temperature range (ambient): -40 to 105°C
• Up to 46 general-purpose I/O (GPIO)
NXP reserves the right to change the production detail specifications as may be
required to permit improvements in the design of its products.
Ordering Information
Part Number
Flash (KB)
MK02FN128VLH10
MK02FN128VLF10
MK02FN128VFM10
MK02FN64VLH10
MK02FN64VLF10
MK02FN64VFM10
128
128
128
64
64
64
Memory
SRAM (KB)
16
16
16
16
16
16
46
35
26
46
35
26
Number of GPIOs
Device Revision Number
Device Mask Set Number
0N36M
SIM_SDID[REVID]
0000
JTAG ID Register[PRN]
0000
Related Resources
Type
Selector
Guide
Reference
Manual
Data Sheet
Chip Errata
Package
drawing
Description
The NXP Solution Advisor is a web-based tool that features interactive
application wizards and a dynamic product selector.
The Reference Manual contains a comprehensive description of the
structure and function (operation) of a device.
The Data Sheet includes electrical characteristics and signal
connections.
Resource
KINETISKMCUSELGD
K02P64M100SFARM
This document.
The chip mask set Errata provides additional or corrective information for
Kinetis_K_0N36M
a particular device mask set.
Package dimensions are provided by the part number:
• MK02FN64VFM10
• MK02FN128VFM10
• MK02FN64VLF10
• MK02FN128VLF10
• MK02FN64VLH10
• MK02FN128VLH10
•
•
•
•
•
•
98ARE10566D
98ARE10566D
98ASH00962A
98ASH00962A
98ASS23234W
98ASS23234W
Figure 1
shows the functional modules in the chip.
2
NXP Semiconductors
Kinetis K02 64 KB/128 KB Flash, Rev. 4, 08/2016
ARM
®
Cortex™-M4
Core
Debug
interfaces
Interrupt
controller
DSP
System
DMA (4 ch)
Memories and Memory Interfaces
Program
flash
(Up to 128 KB)
RAM
(16 KB)
Clocks
Frequency-
locked loop
Low/high
frequency
oscillators
FPU
Low-leakage
wakeup
Internal
and external
watchdogs
Internal
reference
clocks
and Integrity
CRC
Security
Analog
16-bit
SAR ADC x1
Comparator
with 6-bit DAC
x2
12-bit DAC
x1
High
performance
voltage ref
Timers
Timers
x1 (6ch)
x2 (2ch)
Programmable
Communication Interfaces
I
C
x1
SPI
x1
2
Human-Machine
Interface (HMI)
Up to
46 GPIOs
UART
x2
Flash access
control
delay block
Periodic
interrupt
timers
16-bit
low-power
timer
Figure 1. Functional block diagram
Kinetis K02 64 KB/128 KB Flash, Rev. 4, 08/2016
3
NXP Semiconductors
Table of Contents
1 Ratings.................................................................................... 5
1.1 Thermal handling ratings................................................. 5
1.2 Moisture handling ratings................................................ 5
1.3 ESD handling ratings....................................................... 5
1.4 Voltage and current operating ratings............................. 5
2 General................................................................................... 6
2.1 AC electrical characteristics.............................................6
2.2 Nonswitching electrical specifications..............................6
2.2.1 Voltage and current operating requirements....... 6
2.2.2 LVD and POR operating requirements................7
2.2.3 Voltage and current operating behaviors.............8
2.2.4 Power mode transition operating behaviors........ 9
2.2.5 Power consumption operating behaviors............ 10
2.2.6 EMC radiated emissions operating behaviors..... 16
2.2.7 Designing with radiated emissions in mind..........17
2.2.8 Capacitance attributes.........................................17
2.3 Switching specifications...................................................17
2.3.1 Device clock specifications..................................17
2.3.2 General switching specifications......................... 18
2.4 Thermal specifications..................................................... 18
2.4.1 Thermal operating requirements......................... 18
2.4.2 Thermal attributes................................................19
3 Peripheral operating requirements and behaviors.................. 20
3.1 Core modules.................................................................. 20
3.1.1 SWD electricals .................................................. 20
3.1.2 JTAG electricals.................................................. 21
3.2 System modules.............................................................. 24
3.3 Clock modules................................................................. 24
3.3.1 MCG specifications..............................................24
3.3.2 IRC48M specifications.........................................26
3.3.3 Oscillator electrical specifications........................26
3.4 Memories and memory interfaces................................... 29
3.4.1 Flash electrical specifications.............................. 29
3.5 Security and integrity modules........................................ 30
3.6 Analog............................................................................. 30
3.6.1
3.6.2
3.6.3
ADC electrical specifications............................... 30
CMP and 6-bit DAC electrical specifications....... 34
12-bit DAC electrical characteristics....................37
3.6.4 Voltage reference electrical specifications.......... 40
3.7 Timers..............................................................................41
3.8 Communication interfaces............................................... 41
DSPI switching specifications (limited voltage
range).................................................................. 42
3.8.2 DSPI switching specifications (full voltage
range).................................................................. 43
3.8.3 Inter-Integrated Circuit Interface (I2C) timing...... 45
3.8.4 UART switching specifications............................ 47
4 Dimensions............................................................................. 47
4.1 Obtaining package dimensions....................................... 47
5 Pinout...................................................................................... 47
5.1 K02F Signal Multiplexing and Pin Assignments.............. 47
5.2 Recommended connection for unused analog and
digital pins........................................................................50
5.3 K02F Pinouts................................................................... 51
6 Part identification.....................................................................54
6.1 Description.......................................................................54
6.2 Format............................................................................. 54
6.3 Fields............................................................................... 55
6.4 Example...........................................................................55
6.5 48-pin LQFP part marking............................................... 56
6.6 32-pin QFN part marking................................................. 56
7 Terminology and guidelines.................................................... 56
7.1 Definitions........................................................................ 56
7.2 Examples......................................................................... 57
7.3 Typical-value conditions.................................................. 57
7.4 Relationship between ratings and operating
requirements....................................................................58
7.5 Guidelines for ratings and operating requirements..........58
8 Revision History...................................................................... 58
3.8.1
4
NXP Semiconductors
Kinetis K02 64 KB/128 KB Flash, Rev. 4, 08/2016
Ratings
1 Ratings
1.1 Thermal handling ratings
Symbol
T
STG
T
SDR
Description
Storage temperature
Solder temperature, lead-free
Min.
–55
—
Max.
150
260
Unit
°C
°C
Notes
1
2
1. Determined according to JEDEC Standard JESD22-A103,
High Temperature Storage Life.
2. Determined according to IPC/JEDEC Standard J-STD-020,
Moisture/Reflow Sensitivity Classification for Nonhermetic
Solid State Surface Mount Devices.
1.2 Moisture handling ratings
Symbol
MSL
Description
Moisture sensitivity level
Min.
—
Max.
3
Unit
—
Notes
1
1. Determined according to IPC/JEDEC Standard J-STD-020,
Moisture/Reflow Sensitivity Classification for Nonhermetic
Solid State Surface Mount Devices.
1.3 ESD handling ratings
Symbol
V
HBM
V
CDM
I
LAT
Description
Electrostatic discharge voltage, human body model
Electrostatic discharge voltage, charged-device
model
Latch-up current at ambient temperature of 105°C
Min.
-2000
-500
-100
Max.
+2000
+500
+100
Unit
V
V
mA
Notes
1
2
3
1. Determined according to JEDEC Standard JESD22-A114,
Electrostatic Discharge (ESD) Sensitivity Testing Human
Body Model (HBM).
2. Determined according to JEDEC Standard JESD22-C101,
Field-Induced Charged-Device Model Test Method for
Electrostatic-Discharge-Withstand Thresholds of Microelectronic Components.
3. Determined according to JEDEC Standard JESD78,
IC Latch-Up Test.
1.4 Voltage and current operating ratings
Kinetis K02 64 KB/128 KB Flash, Rev. 4, 08/2016
5
NXP Semiconductors
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