IS62WV5128EALL/EBLL/ECLL
IS65WV5128EBLL/ECLL
512Kx8 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
KEY FEATURES
High-speed access time: 35ns, 45ns, 55ns
CMOS low power operation
– Operating Current: 22 mA (max) at 85°C
– CMOS Standby Current: 3.7uA (typ) at 25°C
TTL compatible interface levels
Single power supply
–1.65V-2.2V V
DD
(IS62/65WV5128EALL)
– 2.2V-3.6V V
DD
(IS62/65WV5128EBLL)
– 3.3V +/-5% V
DD
(IS62/65WV5128ECLL)
Three state outputs
Industrial and Automotive temperature support
Lead-free available
APRIL 2017
DESCRIPTION
The
ISSI
IS62/65WV5128EALL/BLL/CLL are high-
speed, 4M bit static RAMs organized as 512K words by
8 bits. It is fabricated using
ISSI's
high-performance
CMOS technology. This highly reliable process coupled
with innovative circuit design techniques, yields high-
performance and low power consumption devices.
When
CS#
is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip
Enable and Output Enable inputs. The active LOW Write
Enable (WE#) controls both writing and reading of the
memory.
The IS62/65WV5128EALL/EBLL are packaged in the
JEDEC standard 32-pin TSOP (TYPE I/II), sTSOP
(TYPE I), SOP and 36-pin mini BGA.
FUNCTIONAL BLOCK DIAGRAM
512 K x 8
MEMORY
ARRAY
A 0 – A18
DECODER
VDD
GND
I/O 0 – I/O7
I/ O
DATA
CIRCUIT
COLUMN / O
I
CS #
OE#
WE#
CONTROL
CIRCUIT
Copyright © 2017 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such
applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc.-
www.issi.com
Rev. A4
04/18/2017
1
IS62WV5128EALL/EBLL/ECLL
IS65WV5128EBLL/ECLL
FUNCTION DESCRIPTION
SRAM is one of random access memories. SRAM has three different modes supported. Each function is described
below with Truth Table.
STANDBY MODE
Device enters standby mode when deselected (CS# HIGH). The input and output pins (I/O0-7) are placed in a high
impedance state. CMOS input in this mode will maximize saving power.
WRITE MODE
Write operation issues with Chip selected (CS# LOW) and Write Enable (WE#) input LOW. The input and output pins
(I/O0-7) are in data input mode. Output buffers are closed during this time even if OE# is LOW.
READ MODE
Read operation issues with Chip selected (CS# LOW) and Write Enable (WE#) input HIGH. When OE# is LOW, output
buffer turns on to make data output. Any input to I/O pins during READ mode is not permitted.
In the READ mode, output buffers can be turned off by pulling OE# HIGH. In this mode, internal device operates as
READ but I/Os are in a high impedance state. Since device is in READ mode, active current is used.
TRUTH TABLE
Mode
Not Selected
Output Disabled
Write
Read
CS#
H
L
L
L
WE#
X
H
L
H
OE#
X
H
X
L
I/O0-I/O7
High-Z
High-Z
DIN
DOUT
VDD Current
ISB2
ICC,ICC1
ICC,ICC1
ICC,ICC1
Integrated Silicon Solution, Inc.-
www.issi.com
Rev. A4
04/18/2017
3
IS62WV5128EALL/EBLL/ECLL
IS65WV5128EBLL/ECLL
ABSOLUTE MAXIMUM RATINGS AND OPERATING RANGE
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Parameter
Vt er m
Terminal Voltage with Respect to GND
V
DD
tStg
P
T
Notes:
1.
Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Value
–0.5 to V
DD
+ 0.5
–0.3 to 4.0
–65 to +150
1.0
Unit
V
V
C
W
V
DD
Related to GND
Storage Temperature
Power Dissipation
OPERATING RANGE
(1)
Range
Commercial
Industrial
Automotive
Commercial
Industrial
Automotive
Commercial
Industrial
Automotive
Note:
1.
Ambient Temperature
0C to +70C
-40C to +85C
-40C to +125C
0C to +70C
-40C to +85C
-40C to +125C
0C to +70C
-40C to +85C
-40C to +125C
Part Number
~EALL
S
PEED
(max)
55 ns
55 ns
55 ns
45ns
VDD(min)
1.65V
1.65V
1.65V
2.2V
2.2V
2.2V
3.135V
3.135V
3.135V
VDD(typ)
1.8V
1.8V
1.8V
3.0V
3.0V
3.0V
3.3V
3.3V
3.3V
VDD(max)
2.2V
2.2V
2.2V
3.6V
3.6V
3.6V
3.465V
3.465V
3.465V
~EBLL
45ns
55ns
35ns
~ECLL
35ns
45ns
Full device AC operation assumes a 100 µs ramp time from 0 to Vcc(min) and 200 µs wait time after Vcc stabilization.
PIN CAPACITANCE
(1)
Parameter
Input capacitance
DQ capacitance (IO0–IO7)
Symbol
C
IN
C
I/O
Test Condition
T
A
= 25°C, f = 1 MHz, V
DD
= V
DD
(typ)
Max
6
8
Units
pF
pF
Note:
1. These parameters are guaranteed by design and tested by a sample basis only.
THERMAL CHARACTERISTICS
(1)
Parameter
Thermal resistance from junction to ambient (airflow = 1m/s)
Thermal resistance from junction to pins
Thermal resistance from junction to case
Note:
1. These parameters are guaranteed by design and tested by a sample basis only.
Symbol
R
θJA
R
θJB
R
θJC
Rating
TBD
TBD
TBD
Units
°C/W
°C/W
°C/W
Integrated Silicon Solution, Inc.-
www.issi.com
Rev. A4
04/18/2017
4
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