Data Sheet No. PD60260
IRS2108
/
IRS21084(S)PbF
Features
HALF-BRIDGE DRIVER
Packages
8-Lead PDIP
14-Lead PDIP
•
Floating channel designed for bootstrap operation
•
Fully operational to +600 V
•
Tolerant to negative transient voltage, dV/dt
•
•
•
•
•
•
•
•
•
•
•
immune
Gate drive supply range from 10 V to 20 V
Undervoltage lockout for both channels
3.3 V, 5 V, and 15 V input logic compatible
Cross-conduction prevention logic
Matched propagation delay for both channels
High-side output in phase with HIN input
Low-side output out of phase with
LIN
input
Logic and power ground +/- 5 V offset
Internal 540 ns deadtime, and programmable up
to 5
µ
s with one external R
DT
resistor (IRS21084)
Lower di/dt gate driver for better noise immunity
RoHS compliant
8-Lead SOIC
14-Lead SOIC
Feature Comparison
The IRS2108/IRS21084 are high volt-
Cross-
age, high speed power MOSFET and
Deadtime
ton/toff
Input
conduction
Part
Ground Pins
IGBT drivers with dependent high- and
logic
prevention
(ns)
(ns)
logic
low-side referenced output channels.
2106/2301
COM
HIN/LIN
no
none
220/200
Proprietary HVIC and latch immune
21064
V
SS
/COM
2108
Internal 540
COM
CMOS technologies enable ruggedized
HIN/LIN
yes
220/200
Programmable 540 - 5000
21084
V
SS
/COM
monolithic construction. The logic input
2109/2302
Internal 540
COM
IN/SD
yes
750/200
is compatible with standard CMOS or
Programmable 540 - 5000
21094
V
SS
/COM
LSTTL output, down to 3.3 V logic. The
yes
160/140
HIN/LIN
Internal 100
2304
COM
output drivers feature a high pulse cur-
rent buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an
N-channel power MOSFET or IGBT in the high-side configuration which operates up to 600 V.
Description
Typical Connection
V
CC
up to 600 V
V
CC
HIN
LIN
V
B
HO
V
S
LO
up to 600 V
TO
LOAD
HIN
LIN
COM
IRS2108
V
CC
HIN
LIN
V
CC
HIN
LIN
DT
V
SS
R
DT
V
SS
IRS21084
HO
V
B
V
S
TO
LOAD
(Refer to Lead Assignments for correct pin
configuration). These diagrams show
electrical connections only. Please refer to
our Application Notes and DesignTips for
proper circuit board layout.
COM
LO
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1
IRS2108/IRS21084(S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol
V
B
V
S
V
HO
V
CC
V
LO
DT
V
IN
V
SS
dV
S
/dt
Definition
High-side floating absolute v
oltage
High-side floating supply offset voltage
High-side floating output voltage
Low-side and logic fixed supply voltage
Low-side output voltage
Programmable deadtime pin voltage (IRS21084 only)
Logic input voltage (HIN &
LIN
)
Logic ground (IRS21084 only
)
Allowable offset supply voltage transient
(8 lead PDIP)
(8 lead SOIC)
(14 lead PDIP)
(14 lead SOIC)
(8 lead PDIP)
(8 lead SOIC)
(14 lead PDIP)
(14 lead SOIC)
Min.
-0.3
V
B
- 25
V
S
- 0.3
-0.3
-0.3
V
SS
- 0.3
V
SS
- 0.3
V
CC
- 25
—
—
—
—
—
—
—
—
—
—
-50
—
Max.
625
V
B
+ 0.3
V
B
+ 0.3
25
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
50
1.0
0.625
1.6
1.0
125
200
75
120
150
150
300
Units
V
V/ns
P
D
Package power dissipation @ T
A
≤
+25
o
C
W
Rth
JA
Thermal resistance, junction to ambient
°C/W
T
J
T
S
T
L
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The V
S
and V
SS
offset rating are tested with all supplies biased at a 15 V differential.
Symbol
VB
V
S
V
HO
V
CC
V
LO
V
IN
Definition
High-side floating supply absolute voltage
High-side floating supply offset voltage
High-side floating output voltage
Low-side and logic fixed supply voltage
Low-side output voltage
Logic input voltage
IRS2108
IRS21084
Min.
V
S
+ 10
Note
1
V
S
10
0
COM
V
SS
Max.
V
S
+ 20
600
V
B
20
V
CC
V
CC
V
CC
Units
V
DT
Programmable deadtime pin voltage (IRS21084 only)
V
S
V
CC
V
SS
Logic ground (IRS21084 only
)
-5
5
T
A
Ambient temperature
-40
125
°
C
Note
1:
Logic operational for V
S
of -5 V to +600 V. Logic state held for V
S
of -5 V to -V
BS
. (Please refer to the Design Tip
DT97-3 for more details).
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2
IRS2108/IRS21084(S)PbF
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15 V, V
SS
= COM, C
L
= 1000 pF, T
A
= 25
°C,
DT = V
SS
unless otherwise specified.
Symbol
ton
toff
MT
tr
tf
DT
MDT
Definition
Turn-on propagation delay
Turn-off propagation delay
Delay matching
|
ton - toff
|
Turn-on rise time
Turn-off fall time
Deadtime: LO turn-off to HO turn-on(DT
LO-HO
)
&
HO turn-off to LO turn-on (DT
HO-LO
)
Deadtime matching =
|
DT
LO-HO
- DT
HO-LO
|
Min.
—
—
—
—
—
400
4
—
—
Typ.
220
200
0
100
35
540
5
0
0
Max. Units Test Conditions
300
280
30
220
80
680
6
60
600
µs
ns
ns
V
S
= 0 V
R
DT
= 0
Ω
R
DT
= 200 kΩ
(IR21084)
R
DT
=0
Ω
R
DT
= 200 kΩ
(IR21084)
VS = 0 V
V
S
= 0 V or 600 V
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15 V, V
SS
= COM, DT= V
SS
and T
A
= 25
°C
unless otherwise specified. The V
IL
, V
IH,
and I
IN
parameters are referenced to V
SS
/COM and are applicable to the respective input leads: HIN and LIN. The V
O
, I
O,
and
Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol
V
IH
V
IL
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
V
CCUV+
V
BSUV+
V
CCUV-
V
BSUV-
V
CCUVH
V
BSUVH
I
O+
I
O-
Definition
Logic “1” input voltage for HIN & logic “0” for
LIN
Logic “0” input voltage for HIN & logic “1” for
LIN
High level output voltage, V
BIAS
- V
O
Low level output voltage, V
O
Offset supply leakage current
Quiescent V
BS
supply current
Quiescent V
CC
supply current
Logic “1” input bias current
Logic “0” input bias current
V
CC
and V
BS
supply undervoltage positive going
threshold
V
CC
and V
BS
supply undervoltage negative going
threshold
Hysteresis
Output high short circuit pulsed current
Output low short circuit pulsed current
Min. Typ. Max. Units Test Conditions
2.5
—
—
—
—
20
0.4
—
—
8.0
7.4
0.3
120
250
—
—
0.05
0.02
—
75
1.0
5
—
8.9
8.2
0.7
290
600
—
0.8
0.2
0.1
50
130
1.6
20
5
V
CC
= 10 V to 20 V
V
I
O
= 2 mA
V
B
= V
S
= 600 V
µA
mA
V
IN
= 0 V or 5 V
V
IN
= 0 V or 5 V
RDT=0
Ω
HIN = 5 V,
LIN
= 0 V
µA
HI
N = 0 V,
LIN
= 5 V
9.8
9.0
—
—
mA
—
V
O
= 0 V,
PW
≤
10
µs
V
O
= 15 V,
PW
≤
10
µs
V
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3
IRS2108/IRS21084(S)PbF
Functional Block Diagram
VB
2108
HV
LEVEL
SHIFTER
UV
DETECT
R
PULSE
FILTER
R
S
Q
HO
HIN
VSS/COM
LEVEL
SHIFT
VS
PULSE
GENERATOR
DT
DEADTIME &
SHOOT-THROUGH
PREVENTION
UV
DETECT
VCC
+5V
LO
LIN
VSS/COM
LEVEL
SHIFT
DELAY
COM
VSS
VB
21084
HIN
VSS/COM
LEVEL
SHIFT
HV
LEVEL
SHIFTER
PULSE
GENERATOR
UV
DETECT
R
PULSE
FILTER
R
S
Q
HO
VS
DT
+5V
DEADTIME &
SHOOT-THROUGH
PREVENTION
UV
DETECT
VCC
LO
LIN
VSS/COM
LEVEL
SHIFT
DELAY
COM
VSS
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4
IRS2108/IRS21084(S)PbF
Lead Definitions
Symbol Description
HIN
LIN
DT
VSS
V
B
HO
V
S
V
CC
LO
COM
Logic input for high-side gate driver output (HO), in phase (referenced to COM for IRS2108
and VSS for IRS21084)
Logic input for low-side gate driver output (LO), out of phase (referenced to COM for IRS2108
and VSS for IRS21084)
Programmable deadtime lead, referenced to VSS (IR21084 only)
Logic ground (IRS21084 only)
High-side floating supply
High-side gate driver output
High-side floating supply return
Low-side and logic fixed supply
Low-side gate driver output
Low-side return
Lead Assignments
1
2
3
4
VCC
HIN
LIN
COM
VB
HO
VS
LO
8
7
6
5
1
2
3
4
VCC
HIN
LIN
COM
VB
HO
VS
LO
8
7
6
5
8 Lead PDIP
8 Lead SOIC
IRS2108PbF
IRS2108SPbF
1
2
3
4
5
6
7
VCC
HIN
LIN
DT
VSS
COM
LO
VB
HO
VS
1
4
13
12
11
10
9
8
1
2
3
4
5
6
7
VCC
HIN
LIN
DT
VSS
COM
LO
VB
HO
VS
1
4
13
12
11
10
9
8
14 Lead PDIP
14 Lead SOIC
IRS21084PbF
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IRS21084SPbF
5
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