MC74LVX14
Hex Schmitt Inverter
With 5 V−Tolerant Inputs
The MC74LVX14 is an advanced high speed CMOS Schmitt
inverter. The inputs tolerate voltages up to 7 V, allowing the interface
of 5 V systems to 3 V systems.
The MC74LVX14 is pin and functionally compatible to the
MC74LVX04, but the inputs have hysteresis and, with its Schmitt
trigger function, can be used as a line receiver which will receive slow
input signals.
Features
http://onsemi.com
•
•
•
•
•
•
•
•
High Speed: t
PD
= 6.8 ns (Typ) at V
CC
= 3.3 V
Low Power Dissipation: I
CC
= 2
mA
(Max) at T
A
= 25°C
Powerdown Protection Provided on Inputs
Balanced Propagation Delays
Low Noise: V
OLP
= 0.5 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance: Human Body Model > 2000 V;
Machine Model > 200 V
•
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
•
These Devices are Pb−Free and are RoHS Compliant
A0
A1
A2
A3
A4
A5
1
3
5
9
11
13
2
4
6
8
10
12
O0
O1
SOIC−14 NB
D SUFFIX
CASE 751A
TSSOP−14
DT SUFFIX
CASE 948G
PIN ASSIGNMENT
V
CC
14
A5
13
O5
12
A4
11
O4
10
A3
9
O3
8
1
A0
2
O0
3
A1
4
O1
5
A2
6
7
O2 GND
14−Lead
(Top View)
MARKING DIAGRAMS
14
LVX14G
AWLYWW
1
O2
O3
14
O4
O5
1
SOIC−14 NB
LVX
14
ALYWG
G
TSSOP−14
LVX14
A
WL, L
Y
WW, W
G or
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
Figure 1. Logic Diagram
PIN NAMES
Pins
An
On
Function
Data Inputs
Data Outputs
FUNCTION TABLE
An
L
H
©
Semiconductor Components Industries, LLC, 2014
(Note: Microdot may be in either location)
On
H
L
1
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
August, 2014 − Rev. 7
Publication Order Number:
MC74LVX14/D
MC74LVX14
MAXIMUM RATINGS
Symbol
V
CC
V
in
V
out
I
IK
I
OK
I
out
I
CC
P
D
T
stg
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current, per Pin
DC Supply Current, V
CC
and GND Pins
Power Dissipation
Storage Temperature
Parameter
Value
–0.5 to +7.0
–0.5 to +7.0
–0.5 to V
CC
+0.5
−20
±20
±25
±50
180
–65 to +150
Unit
V
V
V
mA
mA
mA
mA
mW
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
in
V
out
T
A
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Operating Temperature, All Package Types
Parameter
Min
2.0
0
0
−40
Max
3.6
5.5
V
CC
+85
Unit
V
V
V
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
Symbol
V
T+
V
T−
V
H
V
OH
Parameter
Positive Threshold Voltage (Figure 4)
Negative Threshold Voltage (Figure 4)
Hysteresis Voltage (Figure 4)
High−Level Output Voltage
(V
in
= V
IH
or V
IL
)
Low−Level Output Voltage
(V
in
= V
IH
or V
IL
)
Input Leakage Current
Quiescent Supply Current
I
OH
= −50
mA
I
OH
= −50
mA
I
OH
= −4 mA
I
OL
= 50
mA
I
OL
= 50
mA
I
OL
= 4 mA
V
in
= 5.5 V or GND
V
in
= V
CC
or GND
Test Conditions
V
CC
V
3.0
3.0
3.0
2.0
3.0
3.0
2.0
3.0
3.0
3.6
3.6
0.90
0.30
1.9
2.9
2.58
2.0
3.0
0.0
0.0
0.1
0.1
0.36
±0.1
2.0
1.20
T
A
= 25°C
Min
Typ
Max
2.20
0.90
0.30
1.9
2.9
2.48
0.1
0.1
0.44
±1.0
20.0
1.20
T
A
= −40 to 85°C
Min
Max
2.20
Unit
V
V
V
V
V
OL
V
I
in
I
CC
mA
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î ÎÎ Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î ÎÎ Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î ÎÎ Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î ÎÎ Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î ÎÎ Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î ÎÎ Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î ÎÎ Î Î
Î
Î
Î Î ÎÎ Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î ÎÎ Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3.0 ns)
Symbol
t
PLH
,
t
PHL
Parameter
T
A
= 25°C
Typ
8.7
11.2
6.8
9.3
T
A
= −40 to 85°C
Min
1.0
1.0
1.0
1.0
Max
19.5
23.0
12.5
16.0
1.5
1.5
Test Conditions
Min
Max
Unit
ns
Propagation Delay, Input−to−Output
V
CC
= 2.7 V
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
16.3
19.8
10.6
14.1
1.5
1.5
V
CC
= 3.3
±
0.3 V
t
OSHL
t
OSLH
Output−to−Output Skew (Note 1)
V
CC
= 2.7 V
V
CC
= 3.3
±
0.3 V
C
L
= 50 pF
C
L
= 50 pF
ns
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t
OSHL
) or LOW−to−HIGH (t
OSLH
); parameter
guaranteed by design.
http://onsemi.com
2
MC74LVX14
CAPACITIVE CHARACTERISTICS
T
A
= 25°C
Symbol
Cin
C
PD
Input Capacitance
Power Dissipation Capacitance (Note 2)
Parameter
Min
Typ
4
21
Max
10
T
A
= −40 to 85°C
Min
Max
10
Unit
pF
pF
2. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= C
PD
V
CC
f
in
+ I
CC
/ 6 (per buffer). C
PD
is used to determine the
no−load dynamic power consumption; P
D
= C
PD
V
CC2
f
in
+ I
CC
V
CC
.
NOISE CHARACTERISTICS
(Input t
r
= t
f
= 3.0 ns, C
L
= 50 pF, V
CC
= 3.3 V, Measured in SOIC Package)
T
A
= 25°C
Symbol
V
OLP
V
OLV
V
IHD
V
ILD
Quiet Output Maximum Dynamic V
OL
Quiet Output Minimum Dynamic V
OL
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
Characteristic
Typ
0.3
−0.3
Max
0.5
−0.5
2.0
0.9
Unit
V
V
V
V
A
50%
V
CC
GND
t
PLH
t
PHL
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
C
L
*
O
50% V
CC
*Includes all probe and jig capacitance
Figure 2. Switching Waveforms
Figure 3. Test Circuit
ORDERING INFORMATION
Device
MC74LVX14DR2G
MC74LVX14DTR2G
NLV74LVX14DTR2G*
Package
SOIC−14 NB
(Pb−Free)
TSSOP−14
(Pb−Free)
TSSOP−14
(Pb−Free)
Shipping
†
2500 Tape & Reel
2500 Tape & Reel
2500 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
http://onsemi.com
3
MC74LVX14
VT , TYPICAL INPUT THRESHOLD VOLTAGE (VOLTS)
4
3
2
(V
T+
)
V
H
typ
(V
T-
)
1
2
2.5
3
3.5
3.6
V
CC
, POWER SUPPLY VOLTAGE (VOLTS) V
H
typ = (V
T+
typ) - (V
T-
typ)
Figure 4. Typical Input Threshold, V
T+
, V
T−
versus Power Supply Voltage
V
H
V
in
V
CC
V
T+
V
T-
GND
V
OH
V
out
V
OL
(a) A Schmitt-Trigger Squares Up Inputs With Slow Rise and Fall Times
V
H
V
in
V
CC
V
T+
V
T-
GND
V
OH
V
out
V
OL
(b) A Schmitt-Trigger Offers Maximum Noise Immunity
Figure 5. Typical Schmitt−Trigger Applications
http://onsemi.com
4
MC74LVX14
PACKAGE DIMENSIONS
TSSOP−14
CASE 948G
ISSUE B
14X
K
REF
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
INCHES
MIN
MAX
MIN MAX
4.90
5.10 0.193 0.200
4.30
4.50 0.169 0.177
−−−
1.20
−−− 0.047
0.05
0.15 0.002 0.006
0.50
0.75 0.020 0.030
0.65 BSC
0.026 BSC
0.50
0.60 0.020 0.024
0.09
0.20 0.004 0.008
0.09
0.16 0.004 0.006
0.19
0.30 0.007 0.012
0.19
0.25 0.007 0.010
6.40 BSC
0.252 BSC
0
_
8
_
0
_
8
_
0.10 (0.004)
0.15 (0.006) T U
S
M
T U
S
V
S
N
2X
L/2
14
8
0.25 (0.010)
M
L
PIN 1
IDENT.
1
7
B
−U−
N
F
DETAIL E
K
0.15 (0.006) T U
S
J J1
SECTION N−N
−W−
C
0.10 (0.004)
−T−
SEATING
PLANE
D
G
H
DETAIL E
SOLDERING FOOTPRINT*
7.06
1
14X
0.36
14X
1.26
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
5
ÇÇÇ
ÉÉÉ
ÇÇÇ
ÉÉÉ
ÇÇÇ
A
−V−
K1
0.65
PITCH
DIMENSIONS: MILLIMETERS
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
