74HC594; 74HCT594
8-bit shift register with output register
Rev. 03 — 20 December 2006
Product data sheet
1. General description
The 74HC594; 74HCT594 is a high-speed Si-gate CMOS device and is pin compatible
with Low-Power Schottky TTL (LSTTL).
The 74HC594; 74HCT594 is an 8-bit, non-inverting, serial-in, parallel-out shift register that
feeds an 8-bit D-type storage register. Separate clocks (SHCP and STCP) and direct
overriding clears (SHR and STR) are provided on both the shift and storage registers.
A serial output (Q7S) is provided for cascading purposes.
Both the shift and storage register clocks are positive-edge triggered. If the user wishes to
connect both clocks together, the shift register will always be one count pulse ahead of the
storage register.
2. Features
I
I
I
I
I
I
I
I
Synchronous serial input and output
Complies with JEDEC standard No.7A
8-bit parallel output
Shift and storage registers have independent direct clear and clocks
Independent clocks for shift and storage registers
100 MHz (typical)
Multiple package options
Specified from
−40 °C
to +85
°C
and from
−40 °C
to +125
°C
3. Applications
I
Serial-to parallel data conversion
I
Remote control holding register
NXP Semiconductors
74HC594; 74HCT594
8-bit shift register with output register
4. Ordering information
Table 1.
Ordering information
Package
Temperature
range
74HC594D
74HC594DB
74HC594N
74HCT594D
74HCT594DB
74HCT594N
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
Name
SO16
SSOP16
DIP16
SO16
SSOP16
DIP16
Description
plastic small outline package; 16 leads;
body width 3.9 mm
plastic shrink small outline package; 16 leads;
body width 5.3 mm
plastic dual in-line package; 16 leads (300 mil)
plastic small outline package; 16 leads;
body width 3.9 mm
plastic shrink small outline package; 16 leads;
body width 5.3 mm
plastic dual in-line package; 16 leads (300 mil)
Version
SOT109-1
SOT338-1
SOT38-4
SOT109-1
SOT338-1
SOT38-4
Type number
5. Functional diagram
DS
SHCP
SHR
14
11
10
9
12
13
8-BIT STORAGE REGISTER
Q7S
8-STAGE SHIFT REGISTER
STCP
STR
15 1
2
3
4
5
6
7
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
mbc320
Fig 1. Functional diagram
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
2 of 26
NXP Semiconductors
74HC594; 74HCT594
8-bit shift register with output register
SHCP STCP
STR
11
12
9
15
1
2
DS
14
3
4
5
6
7
10
SHR
13
STR
mbc319
mbc322
13
12
10
11
14
R1 SRG8
C1/
1D
R2
C2
STCP
Q7S
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
DS
SHR
SHCP
2D
15
1
2
3
4
5
6
7
9
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q7S
Fig 2. Logic symbol
Fig 3. IEC logic symbol
STAGE 0
DS
D
Q
D
STAGES 1 TO 6
Q
STAGE 7
D
Q
Q7S
FFSH0
CP
R
SHCP
FFSH7
CP
R
SHR
D
Q
D
CP
Q
FFST0
CP
R
STCP
FFST7
R
STR
Q0
Q1 Q2 Q3 Q4 Q5 Q6
Q7
mbc321
Fig 4. Logic diagram
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
3 of 26
NXP Semiconductors
74HC594; 74HCT594
8-bit shift register with output register
SHCP
DS
STCP
SHR
STR
Q0
Q1
Q6
Q7
Q7S
mbc323
Fig 5. Timing diagram
6. Pinning information
6.1 Pinning
74HC594
74HCT594
Q1
Q2
Q3
Q4
Q5
Q6
Q7
GND
1
2
3
4
5
6
7
8
001aaf611
16 V
CC
15 Q0
14 DS
13 STR
12 STCP
11 SHCP
10 SHR
9
Q7S
Fig 6. Pin configuration SO16
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
4 of 26
NXP Semiconductors
74HC594; 74HCT594
8-bit shift register with output register
74HC594
74HCT594
Q1
1
2
3
4
5
6
7
8
001aaf614
16 V
CC
15 Q0
14 DS
13 STR
12 STCP
11 SHCP
10 SHR
9
Q7S
74HC594
74HCT594
Q1
Q2
Q3
Q4
Q5
Q6
Q7
GND
1
2
3
4
5
6
7
8
001aaf613
Q2
Q3
16 V
CC
15 Q0
14 DS
13 STR
12 STCP
11 SHCP
10 SHR
9
Q7S
GND
Q6
Q7
Q4
Q5
Fig 7. Pin configuration SSOP16
Fig 8. Pin configuration DIP16
6.2 Pin description
Table 2.
Symbol
Q1
Q2
Q3
Q4
Q5
Q6
Q7
GND
Q7S
SHR
SHCP
STCP
STR
DS
Q0
V
CC
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Description
parallel data output 1
parallel data output 2
parallel data output 3
parallel data output 4
parallel data output 5
parallel data output 6
parallel data output 7
ground (0 V)
serial data output
shift register reset (active LOW)
shift register clock input
storage register clock input
storage register reset (active LOW)
serial data input
parallel data output 0
supply voltage
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
5 of 26
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