Dual, 128-Tap, Low Voltage Digitally Controlled
Potentiometer (XDCP™)
ISL23428
The ISL23428 is a volatile, low voltage, low noise, low power,
128-tap, dual digitally controlled potentiometer (DCP) with an
SPI Bus™ interface. It integrates two DCP cores, wiper switches
and control logic on a monolithic CMOS integrated circuit.
Each digitally controlled potentiometer is implemented with a
combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
SPI bus interface. Each potentiometer has an associated
volatile Wiper Register (WRi, i = 0, 1) that can be directly written
to and read by the user. The contents of the WRi controls the
position of the wiper. When powered on, the wiper of each DCP
will always commence at mid-scale (64 tap position).
The low voltage, low power consumption, and small package
of the ISL23428 make it an ideal choice for use in battery
operated equipment. In addition, the ISL23428 has a V
LOGIC
pin allowing down to 1.2V bus operation, independent from the
V
CC
value. This allows for low logic levels to be connected
directly to the ISL23428 without passing through a voltage
level shifter.
The DCP can be used as a three-terminal potentiometer or as a
two-terminal variable resistor in a wide variety of applications
including control, parameter adjustments, and signal processing.
Features
• Two potentiometers per package
• 128 resistor taps
• 10kΩ, 50kΩ or 100kΩ total resistance
• SPI serial interface
- No additional level translator for low bus supply
- Daisy Chaining of multiple DCPs
• Power supply
- V
CC
= 1.7V to 5.5V analog power supply
- V
LOGIC
= 1.2V to 5.5V SPI bus/logic power supply
• Maximum supply current without serial bus activity
(standby)
- 4µA @ V
CC
and V
LOGIC
= 5V
- 1.7µA @ V
CC
and V
LOGIC
= 1.7V
• Shutdown Mode
- Forces the DCP into an end-to-end open circuit and RWi is
connected to RLi internally
- Reduces power consumption by disconnecting the DCP
resistor from the circuit
• Wiper resistance: 70Ω typical @ V
CC
= 3.3V
• Power-on preset to mid-scale (64 tap position)
• Extended industrial temperature range: -40
°
C to +125
°
C
• 14 Ld TSSOP or 16 Ld UTQFN packages
• Pb-free (RoHS compliant)
Applications
• Power supply margining
• Trimming sensor circuits
• Gain adjustment in battery powered instruments
• RF power amplifier bias compensation
10000
V
REF
8000
RESISTANCE (Ω)
6000
RH
-
ISL23428
RW
+
ISL28114
RL
V
REF_M
4000
2000
0
0
32
64
TAP POSITION (DECIMAL)
96
128
FIGURE 1. FORWARD AND BACKWARD RESISTANCE vs TAP
POSITION, 10kΩ DCP
FIGURE 2. V
REF
ADJUSTMENT
July 19, 2012
FN7904.1
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Copyright Intersil Americas Inc. 2011, 2012. All Rights Reserved
Intersil (and design) and XDCP are trademarks owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners
ISL23428
Block Diagram
V
LOGIC
V
CC
RH0
RH1
SCK
SDI
SDO
CS
SPI
INTERFACE
POWER UP
INTERFACE,
CONTROL
AND
STATUS
LOGIC
WR0
VOLATILE
REGISTER
AND
WIPER
CONTROL
CIRCUITRY
WR1
VOLATILE
REGISTER
AND
WIPER
CONTROL
CIRCUITRY
GND
RW0
RL0
RW1
RL1
Pin Configurations
ISL23428
(14 LD TSSOP)
TOP VIEW
GND
1
14 V
CC
13
RL0
12
RW0
11 RH0
10
RH1
9
8
RW1
RL1
Pin Descriptions
TSSOP
1, 7
2
3
4
5
6
8
9
10
UTQFN
5, 6, 15
16
1
2
3
4
8
9
10
11
12
13
14
7
SYMBOL
GND
V
LOGIC
SDO
SCK
SDI
CS
RL1
RW1
RH1
RH0
RW0
RL0
V
CC
NC
Ground pin
SPI bus/logic supply
Range 1.2V to 5.5V
Logic Pin - Serial bus data output
(configurable)
Logic Pin - Serial bus clock input
Logic Pin - Serial bus data input
Logic Pin - Active low chip select
DCP1 “low” terminal
DCP1 wiper terminal
DCP1 “high” terminal
DCP0 “high” terminal
DCP0 wiper terminal
DCP0 “low” terminal
Analog power supply.
Range 1.7V to 5.5V
Not Connected
DESCRIPTION
V
LOGIC
2
SDO
SCK
SDI
CS
GND
3
4
5
6
7
ISL23428
(16 LD UTQFN)
TOP VIEW
V
LOGIC
GND
V
CC
RL0
11
12
13
14
RW0
RH0
RH1
RW1
16
15
14
13
SDO
SCK
SDI
CS
1
2
3
4
5
6
7
12
11
10
9
8
-
GND
GND
2
RL1
NC
FN7904.1
July 19, 2012
ISL23428
Ordering Information
PART NUMBER
(Note 4)
ISL23428TFVZ (Note 2)
ISL23428TFVZ-T7A (Notes 1, 2)
ISL23428TFVZ-TK (Notes 1, 2)
ISL23428UFVZ (Note 2)
ISL23428UFVZ-T7A (Notes 1, 2)
ISL23428UFVZ-TK (Notes 1, 2)
ISL23428WFVZ (Note 2)
ISL23428WFVZ-T7A (Notes 1, 2)
ISL23428WFVZ-TK (Notes 1, 2)
ISL23428TFRUZ-T7A (Notes 1, 3)
ISL23428TFRUZ-TK (Notes 1, 3)
ISL23428UFRUZ-T7A (Notes 1, 3)
ISL23428UFRUZ-TK (Notes 1, 3)
ISL23428WFRUZ-T7A (Notes 1, 3)
ISL23428WFRUZ-TK (Notes 1, 3)
NOTES:
1. Please refer to
TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu plate-e4
termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020
4. For Moisture Sensitivity Level (MSL), please see device information page for
ISL23428.
For more information on MSL please see techbrief
TB363.
PART
MARKING
23428 TFVZ
23428 TFVZ
23428 TFVZ
23428 UFVZ
23428 UFVZ
23428 UFVZ
23428 WFVZ
23428 WFVZ
23428 WFVZ
GBR
GBR
GBP
GBP
GBN
GBN
RESISTANCE
OPTION
(kΩ)
100
100
100
50
50
50
10
10
10
100
100
50
50
10
10
TEMP RANGE
(°C)
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
PACKAGE
(Pb-free)
14 Ld TSSOP
14 Ld TSSOP
14 Ld TSSOP
14 Ld TSSOP
14 Ld TSSOP
14 Ld TSSOP
14 Ld TSSOP
14 Ld TSSOP
14 Ld TSSOP
16 Ld 2.6x1.8 UTQFN
16 Ld 2.6x1.8 UTQFN
16 Ld 2.6x1.8 UTQFN
16 Ld 2.6x1.8 UTQFN
16 Ld 2.6x1.8 UTQFN
16 Ld 2.6x1.8 UTQFN
PKG.
DWG. #
M14.173
M14.173
M14.173
M14.173
M14.173
M14.173
M14.173
M14.173
M14.173
L16.2.6x1.8A
L16.2.6x1.8A
L16.2.6x1.8A
L16.2.6x1.8A
L16.2.6x1.8A
L16.2.6x1.8A
3
FN7904.1
July 19, 2012
ISL23428
Absolute Maximum Ratings
Supply Voltage Range
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.0V
V
LOGIC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.0V
Voltage on Any DCP Terminal Pin . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.0V
Voltage on Any Digital Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.0V
Wiper current IW (10s). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA
ESD Rating
Human Body Model (Tested per JESD22-A114E) . . . . . . . . . . . . . . .4.5kV
CDM Model (Tested per JESD22-A114E) . . . . . . . . . . . . . . . . . . . . . . . 1kV
Machine Model (Tested per JESD22-A115-A) . . . . . . . . . . . . . . . . . 300V
Latch Up (Tested per JESD-78B; Class 2, Level A) . . . . 100mA @ +125°C
Thermal Information
Thermal Resistance (Typical)
θ
JA
(°C/W)
θ
JC
(°C/W)
14 Ld TSSOP Package (Notes 5, 6) . . . . . .
112
40
16 Ld UTQFN Package (Notes 5, 6) . . . . . .
110
64
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . .+150°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
V
CC
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.7V to 5.5V
V
LOGIC
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2V to 5.5V
DCP Terminal Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0 to V
CC
Max Wiper Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±3mA
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
5.
θ
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief
TB379
for details.
6. For
θ
JC
, the “case temp” location is the center top of the package.
V
CC
= 2.7V to 5.5V, V
LOGIC
= 1.2V to 5.5V over recommended operating conditions unless otherwise stated.
Boldface limits apply over the operating temperature range, -40°C to +125°C.
SYMBOL
R
TOTAL
PARAMETER
RH to RL Resistance
W option
U option
T option
RH to RL Resistance Tolerance
End-to-End Temperature Coefficient
W option
U option
T option
V
RH
, V
RL
R
W
DCP Terminal Voltage
Wiper Resistance
V
RH
or V
RL
to GND
RH - floating, V
RL
= 0V, force I
W
current to
the wiper, I
W
= (V
CC
- V
RL
)/R
TOTAL,
V
CC
= 2.7V to 5.5V
V
CC
= 1.7V
C
H
/C
L
/C
W
Terminal Capacitance
I
LkgDCP
Noise
Leakage on DCP Pins
Resistor Noise Density
See “DCP Macro Model” on page 9
Voltage at pin from GND to V
CC
Wiper at middle point, W option
Wiper at middle point, U option
Wiper at middle point, T option
Feed Thru Digital Feed-through from Bus to Wiper
PSRR
Power Supply Reject Ratio
Wiper at middle point
Wiper output change if V
CC
change
±10%; wiper at middle point
-0.4
0
70
-20
TEST CONDITIONS
MIN
(Note 19)
TYP
(Note 7)
10
50
100
±2
125
65
45
V
CC
200
+20
MAX
(Note 19)
UNITS
kΩ
kΩ
kΩ
%
ppm/°C
ppm/°C
ppm/°C
V
Ω
Analog Specifications
580
32/32/32
<0.1
16
49
61
-65
-75
0.4
Ω
pF
µA
nV/√Hz
nV/√Hz
nV/√Hz
dB
dB
4
FN7904.1
July 19, 2012
ISL23428
V
CC
= 2.7V to 5.5V, V
LOGIC
= 1.2V to 5.5V over recommended operating conditions unless otherwise stated.
Boldface limits apply over the operating temperature range, -40°C to +125°C. (Continued)
SYMBOL
INL
(Note 12)
PARAMETER
Integral Non-linearity, Guaranteed
Monotonic
W option
U, T option
DNL
(Note 11)
Differential Non-linearity, Guaranteed
Monotonic
W option
U, T option
FSerror
(Note 10)
Full-scale Error
W option
U, T option
ZSerror
(Note 9)
Zero-scale Error
W option
U, T option
Vmatch
(Note 21)
TC
V
(Note 13)
DCP to DCP Matching
DCPs at same tap position, same voltage
at all RH terminals, and same voltage at
all RL terminals
W option, Wiper Register set to 40 hex
U option, Wiper Register set to 40 hex
T option, Wiper Register set to 40 hex
t
LS_Settling
Large Signal Wiper Settling Time
f
cutoff
-3dB Cutoff Frequency
From code 0 to 7F hex, measured from 0
to 1 LSB settling of the wiper
Wiper at middle point W option
Wiper at middle point U option
Wiper at middle point T option
R
INL
(Note 17)
Integral Non-Linearity, Guaranteed
Monotonic
W option; V
CC
= 2.7V to 5.5V
W option; V
CC
= 1.7V
U, T option; V
CC
= 2.7V to 5.5V
U, T option; V
CC
= 1.7V
R
DNL
(Note 16)
Differential Non-Linearity, Guaranteed
Monotonic
W option; V
CC
= 2.7V to 5.5V
W option; V
CC
= 1.7V
U, T option; V
CC
= 2.7V to 5.5V
U, T option; V
CC
= 1.7V
-0.5
-0.5
-0.5
-1.0
TEST CONDITIONS
MIN
(Note 19)
-0.5
-0.5
-0.5
-0.5
-3
-1.5
0
0
-2
TYP
(Note 7)
±0.15
±0.15
±0.15
±0.15
-1.5
-0.9
1.5
0.9
±0.5
MAX
(Note 19)
+0.5
+0.5
+0.5
+0.5
0
0
3
1.5
2
UNITS
LSB
(Note 8)
LSB
(Note 8)
LSB
(Note 8)
LSB
(Note 8)
LSB
(Note 8)
LSB
(Note 8)
LSB
(Note 8)
LSB
(Note 8)
LSB
(Note 8)
ppm/°C
ppm/°C
ppm/°C
ns
kHz
kHz
kHz
+1.0
MI
(Note 14)
MI
(Note 14)
+0.5
MI
(Note 14)
MI
(Note 14)
+0.5
MI
(Note 14)
MI
(Note 14)
+0.5
MI
(Note 14)
MI
(Note 14)
Analog Specifications
VOLTAGE DIVIDER MODE (0V @ RL; V
CC
@ RH; measured at RW, unloaded)
Ratiometric Temperature Coefficient
8
4
2.3
300
1200
250
120
±0.5
4
±0.15
1
±0.15
±0.4
±0.15
±0.4
RHEOSTAT MODE (Measurements between RW and RL pins with RH not connected, or between RW and RH with RL not connected)
5
FN7904.1
July 19, 2012
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