USER’S MANUAL
ISL54222AIRUEVAL1Z
Evaluation Board
The ISL54222AIRUEVAL1Z evaluation board is designed to
provide a quick and easy method for evaluating the
ISL54222A USB Switch IC.
The ISL54222A device is a unique IC. To use this evaluation
board properly requires a thorough knowledge of the
operation of the IC. Refer to the data sheet for an
understanding of the functions and features of the device.
Studying the device’s truth-table along with its pinout
diagram in the data sheet is the best way to get a quick
understanding of how the part works.
A picture of the evaluation board is shown in Figure 1. The
ISL54222A µTQFN IC is soldered onto the evaluation board. It
is located in the center of the board and is designated as U1.
The evaluation board contains USB connectors to allow the
user to easily interface with the IC to evaluate its functions,
features, and performance. For example, with the board
properly powered and configured as shown in Figure 2, you
can control the logic pins, SE and OE, to switch between the
two high-speed USB devices while connected to a single
USB host (computer).
In a typical application, the ISL54222A dual SPDT device is
used to select between two different USB transceiver
sections of a media player. Logic control from a µprocessor
determines which section to connect to the computer. To
change channels, the following sequence would possibly be
followed:
1. A signal would be sent to take the OE pin High, to open
all switches. The off-isolation of the ISL54222A device
would allow the present active channel to properly
disconnect from the computer.
2. The SEL pin would be set to select the other USB
channel.
3. The OE pin would then be taken Low to close the
switches to make the connection between the computer
and the other USB section of the player.
This application note will guide the user through the process
of configuring and using the evaluation board to evaluate the
ISL54222A device.
AN1450
Rev 1.00
Jul 24, 2009
Picture of Evaluation Board (Top View)
FIGURE 1. ISL54222AIRUEVAL1Z EVALUATION BOARD
Features
• Standard USB Connectors
• Standard Banana Jacks for Power, Ground, V
BUS
and
Logic Connections
• Jumpers to Allow a Device to be Powered Through the
Host Controller
• Convenient Test Points and Connections for Test
Equipment
AN1450 Rev 1.00
Jul 24, 2009
Page 1 of 6
ISL54222AIRUEVAL1Z
Board Architecture/Layout
Basic Layout of Evaluation Board
The basic layout of the main board is as follows: (Refer to
Figure 1).
1. Power and Ground connections are at the top of the board
at banana jacks (J1 and J2).
2. Logic connections, SEL and OE , are at the top of the board
at banana jacks (J4 and J3).
3. USB connection to an upstream host controller (Computer)
is made at J5, located on the left side of the board.
4. USB connections to downstream USB devices are made at
connectors J6 and J7, located on right side of the board.
5. V
BUS
voltage for the USB devices are made through
banana jacks J8 and J9. Optionally, V
BUS
for the USB
devices can be connected to the Host Controller V
BUS
through jumpers JP4 and JP5.
6. Located in the center of the board is the ISL54222A IC (U1).
The eval board has a pin 1 dot, to show how the IC should
be oriented onto the evaluation board. The IC pin 1 indicator
dot needs to be aligned with the evaluation board pin 1 dot
indicator.
through the banana jack J4 (SEL), and access to the OE pin is
through the banana jack J3 (OE).
If SEL is driven Low (to ground) and EN = Low (to ground), the
high-speed (HS) Channel 1 switches will be ON. In this state,
the USB host controller (computer) connected at J5 will be
connected through to the USB device connected at J6 and
data will be able to be transmitted between the computer and
the device.
If SEL is driven High (>1.4V) and EN = Low (to ground), the
high-speed (HS) Channel 2 switches will be ON. In this state,
the USB host controller (computer) connected at J5 will be
connected through to the USB device connected at J7 and
data will be able to be transmitted between the computer and
the device.
If OE = High (>1.4V), all switches will be OFF. Neither device
will be connected through to the host controller.
In a typical application, the ISL54222A dual SPDT device is
used to select between two different USB transceiver sections
of a media player. Logic control from a µprocessor determines
which section to connect to the computer. To change channels,
the following sequence would possibly be followed:
1. A signal would be sent to take the OE pin High, to open all
switches. The off-isolation of the ISL54222A device would
allow the present active channel to properly disconnect
from the computer.
2. The SEL pin would then be set to select the other USB
channel.
3. The OE pin would then be taken Low to close the switches
to make the connection between the computer and the
other USB section of the player.
IC Power Supply
A DC power supply connected at banana jacks J1 (V
DD
) and
J2 (GND) provides power to the ISL54222A IC. The IC
requires a 1.8VDC to 3.3VDC power supply for proper
operation. The power supply should be capable of delivering
100µA of current.
V
BUS
Power Supply
A DC power supply connected at banana jacks J8 (VBUSCH1)
and J9 (VBUSCH2) provides the V
BUS
voltage required by the
USB devices. The devices require a DC power supply in the
range of 4.4V to 5.25V for proper operation. The power supply
should be capable of delivering 100µA of current.
The J8 banana jack is connected to the VBUS pin of the J6 “A”
type USB receptacle. The J9 banana jack is connected to the
VBUS pin of the J7 “A” type USB receptacle.
The V
BUS
voltage can be provided from the USB host
controller (computer) by installing a jumper at either JP4 or
JP5.
With a jumper at JP4, the V
BUS
voltage from the J5 “B” type
USB receptacle gets routed to the J6 USB connector. With this
jumper installed, no DC supply should be connected at the J8
(VBUSCH1) banana jack.
With a jumper at JP5, the V
BUS
voltage from J5 “B” type USB
receptacle gets routed to the J7 USB connector. With this
jumper installed, no DC supply should be connected at the J9
(VBUSCH2) banana jack.
USB Connections
A “B” type USB receptacle labeled “USB TO HOST” (J5) is
located on the left side of the board. This receptacle should be
connected using a standard USB cable to the upstream USB
host controller, which is usually a PC computer or hub. When
this connection is made, the ISL54222A device will connect the
computer through to the USB device determined by the voltage
at the SEL logic control pin.
An “A” type USB receptacle labeled “USB TO DEVICE 1” (J6)
is located on the right side of the board. The USB device can
be plugged directly into this receptacle or through a standard
USB cable.
An “A” type USB receptacle labeled “USB TO DEVICE 2” (J7)
is located on the right side of the board. The USB device can
be plugged directly into this receptacle or through a standard
USB cable.
The USB switches are bi-directional, which allows the host
(computer) and downstream USB device to both send and
receive data.
Logic Control
The state of the ISL54222A device is determined by the
voltage at the SEL pin and the OE pin. Access to the SEL pin is
AN1450 Rev 1.00
Jul 24, 2009
Page 2 of 6
ISL54222AIRUEVAL1Z
High-Speed Switches
The four HSx switches (HSD1-, HSD1+, HSD2-, HSD2+) are
bi-directional switches that can pass rail-to-rail signals.
When powered with a 1.8V supply, these switches have a
nominal r
ON
of 5.7 over the signal range of 0V to 400mV
with a r
ON
flatness of 0.60. The r
ON
matching between the
HSDx- and HSDx+ switches over this signal range is only
0.072 ensuring minimal impact by the switches to USB
high speed signal transitions. As the signal level increases,
the r
ON
switch resistance increases. At signal level of 1.8V
the switch resistance is nominally 12.
The HSx switches were specifically designed to pass USB
2.0 high-speed (480Mbps) differential signals typically in the
range of 0V to 400mV. They have low capacitance and high
bandwidth to pass the USB high-speed signals with
minimum edge and phase distortion to meet USB 2.0 high
speed signal quality specifications.
The HSx switches can also pass USB full-speed signals
(12Mbps) with minimal distortion and meet all the USB
requirements for USB 2.0 full-speed signaling.
The maximum normal operating signal range for the HSx
switches is from 0V to 3.3V. The signal voltage should not be
allow to exceed the 3.3V or go below ground by more than
-0.3V for normal operation.
However, in the event that the USB 5.25V V
BUS
voltage gets
shorted to one or both of the D-/D+ pins, the ISL54222A has
special fault protection circuitry to prevent damage to the
ISL54222A part. The fault circuitry allows the signal pins (D-,
D+, HS1D-, HS1D+, HS2D-, HS2D+) to be driven up to 5.5V
while the V
DD
supply voltage is in the range of 0V to 3.3V. In
this condition, the part draws < 300µA of current and causes
no stress to the IC. In addition, when V
DD
is at 0V, (ground)
all switches are OFF, and the fault voltage is isolated from
the other side of the switch. When V
DD
is in the range of
1.8V to 3.3V, the fault voltage will pass through to the output
of an active switch channel.
TABLE 1. BOARD COMPONENT DEFINITIONS
DESIGNATOR
U1
J5
J6, J7
J1
J2
J4
J3
J8
J9
DESCRIPTION
ISL54222AIRUZ IC
“B” type USB Receptacle
“A” type USB Receptacle
V
DD
Positive Connection
V
DD
Negative Connection
SEL Logic Control
OE Logic Control
V
BUS
Voltage for Highspeed Device 1
V
BUS
Voltage for Highspeed Device 2
JP1, JP2, JP3 D-/D+ Differential Probe Connection
JP4, JP5
Host Controller V
BUS
Jumper
DC POWER
SUPPLY
+1.8V
+
-
COMPUTER
USB PORT
SEL
J4
VDD
GND
J1
J2
JP4
USB TO HOST
U1
J5
OE
DC POWER
SUPPLY
+5V
+
-
LOGIC CONTROL
VBUSCH1
J3
J8
USB
TO
DEVICE 1
J6
USB HIGH-SPEED DEVICE 1
JP1
JP2
JP5
USB
TO
DEVICE 2
J7
VBUSCH2
J9
USB HIGH-SPEED DEVICE 2
JP3
ISL54222AEVAL1Z EVALUATION BOARD
NOTE: DISCONNECT THE +5V POWER SUPPLY CONNECTED TO J8 AND J9 WHEN POWERING THROUGH HOST CONTROLLER BUS.
FIGURE 2. BASIC EVALUATION TEST SETUP BLOCK DIAGRAM
AN1450 Rev 1.00
Jul 24, 2009
Page 3 of 6
ISL54222AIRUEVAL1Z
Using The Board (Refer to Figure 2)
Lab Equipment
The equipment, external supplies and signal sources
needed to operate the board are listed in the following:
1. +1.8V to +3.3V DC Power Supply
2. +5V DC Power Supply
3. Two High-Speed USB device (i.e. USB memory stick,
MP3 Player, etc.)
4. Computer with 2.0 High-Speed USB port
5. Standard USB Cable
6. Logic Controller
JP2
JP3
TP1
TP2
TP3
TP5
TP6
JP1
TABLE 2. TEST POINT DESCRIPTIONS
DESIGNATOR
V
DD
test point
Ground Test Point
DESCRIPTION
OE
Test Point
SEL Test Point
V
BUS
from Pin 1 of Connector J5 Test Point
D-/D+ Differential Probe Connection - COM Side of
Switch
D-/D+ Differential Probe Connection - Device
1Side of Switch
D-/D+ Differential Probe Connection - Device
2Side of Switch
Initial Board Setup Procedure
1. Attach the main evaluation board to a DC power supply
at J1 (V
DD
) and J2 (GND). Positive terminal at J1 and
negative terminal at J2. The supply should be capable of
delivering 1.8V to 3.3V and 100µA of current. Set the
supply voltage to 1.8V.
2. Connect a DC power supply at J8 (VBUSHCH1) and J9
(VBUSCH2). Positive terminal at J8 and J9 and negative
terminal at J2 (GND). The supply should be capable of
delivering 5V and 100mA of current. Set the supply
voltage to 5V. This supply will provide 5V at the V
BUS
pin
of the USB “A” type connectors, J6 and J7.
3. Connect one high-speed USB device at USB connector
J6 and the other high-speed USB device at USB
connector J7. These connectors are located on the right
side of the evaluation board.
4. Remove jumpers JP4 and JP5.
5. Drive the OE control pin HIGH to open all switches of the
ISL54222A IC.
6. Connect USB cable from host (PC computer) to the USB
“B” type receptacle, J5 (USB TO HOST).
You can observe the D- and D+ USB signal of the
High-Speed Channel 1 on an oscilloscope or other test
equipment by connecting a differential probe at JP2.
You can observe the D- and D+ USB signal of the
High-Speed Channel 2 on an oscilloscope or other test
equipment by connecting a differential probe at JP3.
You can observe the D- and D+ USB signal at the COM side
of the switch on an oscilloscope or other test equipment by
connecting a differential probe at JP1.
High-Speed Channel 1 Operation
1. Apply a logic LOW to the SEL pin.
2. Apply a logic LOW to the OE pin.
3. You should now be able to send and receive data
between the computer and the USB device 1 connected
at J6.
4. To disconnect the USB device 1 from the computer take
the OE pin HIGH.
High-Speed Channel 2 Operation
1. Apply a logic HIGH to the SEL pin.
2. Apply a logic LOW to the OE pin.
3. You should now be able to send and receive data
between the computer and USB device 2 connected at
J7.
Test Points
The board has various test points for ease of connecting
probes to make measurements. The test points available are
described in Table 2.
AN1450 Rev 1.00
Jul 24, 2009
Page 4 of 6
ISL54222AIRUEVAL1Z
ISL54222AIRUEVAL1Z Board Schematic
SEL
TP5 J4
1
VDD
J1
1
1
TP1
R2
0
1
GND
J2
1
TP2
1
OE
J3
TP3
1
1
C1
10UF
C2
0.1UF
A
R1
0
1
3
A
1 1
2 2
U1
UTQFN10
7 7
6 6
0.1UF
2
JP2
4
C4
5 MOUNT
1
USB
2
TO
3
DEVICE1
4
6
MOUNT
J6
A
DUSB_ARA42_T11A
1 24 3
10 10
9 9
8 8
A
5 MOUNT
1
2
3
USB
4
TO
6
DEVICE2
MOUNT
J7
A
DUSB_ARA42_T11A
1 24 3
3 3
4 4
5 5
1
3
TP6
1
2
4JP3
0.1UF
C5
DIFFPROBE
A
A
JP4
1
2
1
2
JP5
1
1
A
MOUNT
5
0.1UF
C3
A
1
2
6
USB
897-30-004-90-000
4
3
USB
TO
J5 HOST
A
MOUNT
32
4
1
1
3
2
JP1
4
A
J8
VBUSCH1
J9
VBUSCH2
AN1450 Rev 1.00
Jul 24, 2009
Page 5 of 6
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