Freescale Semiconductor
Data Sheet: Advance Information
An Energy-Efficient Solution by Freescale
Document Number: MMA27XXW
Rev. 0.5, 4/2013
Xtrinsic
MMA27XXW/17XXW
DSI3
Inertial Sensor
MMA27XXW/17XXW family, a SafeAssure solution, includes the DSI3 compatible
overdamped X-axis or Z-axis satellite accelerometers.
MMA27XXW
MMA17XXW
Bottom View
Features
•
•
•
±25 g, ±125 g, ±187 g, ±250 g, ±375 g, X-axis nominal full-scale range
±250 g, Z-axis nominal full-scale range
DSI3 compatible
—
Discovery Mode for physical location identification
— High-side bus switch output driver
— Command and Response Mode support for device configuration
— Periodic Data Collection Mode support for acceleration data transfers
—
•
•
•
•
•
•
•
Background Diagnostic Mode support during Periodic Data Collection
Mode
16-PIN QFN
6 MM X 6 MM X 2 MM
CASE 2086-01
-40°C to 125°C operating temperature range
16
μs
internal sample rate, with interpolation to 1
μs
Six selectable low-pass filter options from 180 Hz to 1200 Hz
Single-pole, IIR high-pass filter with fast startup and optional output rate limiting
Pb-Free, 16-pin QFN, 6 x 6 package
BUS_O
NC
BUS_I
BUSRTN
1
2
3
4
5
PCM
6
TEST_SCLK
7
TEST_MISO
8
TEST_MOSI
Top View
BUSSW
TEST2
TEST
V
BUF
12 V
SS
11 V
REGA
10 TEST_CS
9
V
REG
16 15 14 13
17
Referenced Documents
DSI3 Standard Revision 1.0, Dated February 16, 2011
AEC-Q100, Revision G, dated May 14, 2007
ORDERING INFORMATION
Part Number
MMA2702W
MMA2712W
MMA2718W
MMA2725W
MMA2737W
MMA1725W
MMA2702WR2
MMA2712WR2
MMA2718WR2
MMA2725WR2
MMA2737WR2
MMA1725WR2
Axis
X
X
X
X
X
Z
X
X
X
X
X
Z
Range
±25 g
±125 g
±187 g
±250 g
±375 g
±250 g
±25 g
±125 g
±187 g
±250 g
±375 g
±250 g
Package
2086-01
2086-01
2086-01
2086-01
2086-01
2086-01
2086-01
2086-01
2086-01
2086-01
2086-01
2086-01
Shipping
Rail
Rail
Rail
Rail
Rail
Rail
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
Pin Connections
This document contains information on a new product. Specifications and information herein
are subject to change without notice. Freescale reserves the right to change the detail
© 2013 Freescale Semiconductor, Inc. All rights reserved.
Contents
1
Block Diagram, Pin Descriptions, Application Diagram, and Device Orientation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Pin descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3 Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.4 Device orientation and device marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Maximum ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics - supply and I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4 Electrical Characteristics - sensor and signal chain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.5 Electrical characteristics - self-test and overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.6 Dynamic electrical characteristics - DSI3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.7 Dynamic electrical characteristics - signal chain. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.8 Dynamic electrical characteristics - supply and support circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.1 User-accessible data array . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.2 OTP and Read/Write register array CRC verification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.3 Voltage regulators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.4 Internal oscillator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3.5 Acceleration signal path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
3.6 DSI3 physical layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
3.7 Data transmission modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
3.8 Initialization timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
3.9 Overload response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
DSI3 Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
4.1 Address assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
4.2 DSI3 Command and Response Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
4.3 DSI3 Periodic Data Collection Mode and Background Diagnostic Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
4.4 Maximum number of devices on a network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Exception Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Recommended Footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
2
3
4
5
6
7
8
Related Documentation
The MMA27XXW and MMA17XXW devices features and operations are described in a variety of reference manuals, user guides,
and application notes. To find the most-current versions of these documents:
1.
2.
3.
Go to the Freescale homepage at:
http://www.freescale.com/
In the Keyword search box at the top of the page, enter the device number MMA27XXW or MMA17XXW.
In the Refine Your Result pane on the left, click on the Documentation link.
MMA27XXW
2
Sensors
Freescale Semiconductor, Inc.
1
1.1
BUS_I
Block Diagram, Pin Descriptions, Application Diagram, and Device
Orientation
Block diagram
Buffer
Voltage
Regulator
Reference
Voltage
V
BUF
Internal
Voltage
Regulator
V
BUF
V
REG
V
REGA
V
REGA
V
BUF
V
REG
V
REF
DSI3 Command
Decoder
NVM Programming
Interface
Low Voltage
Detection
V
SS
Oscillator
Serial
Encoder
BUSRTN
BUS_I
R
SENSE
BUS_O
TEST_MISO
BUSSW
Daisy-Chain
Switch Driver
Control
Logic
OTP
Array
TEST_CS
SPI
TEST_SCLK
TEST_MOSI
PCM
Encoder
PCM
V
REG
Self-test
Interface
V
REGA
g-cell
V
REG
CONTROL SIGNAL
IN
OUT
DSP
Sinc filter
Digital
Gain
IIR
LPF
Compensation
Offset
Monitor
HPF
Interpolation
ΣΔ
Converter
Figure 1. Internal block diagram
MMA27XXW
Sensors
Freescale Semiconductor, Inc.
3
1.2
Pin descriptions
BUSSW
TEST2
TEST
16 15 14 13
BUS_O
NC
BUS_I
BUSRTN
1
2
3
4
5
PCM
6
TEST_SCLK
7
TEST_MISO
8
TEST_MOSI
17
12 V
SS
11 V
REGA
10 TEST_CS
9
V
REG
Figure 2. Pin connections
Table 1. Pin descriptions
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin name
BUS_O
NC
BUS_I
BUSRTN
PCM
TEST_SCLK
TEST_MISO
TEST_MOSI
V
REG
TEST_CS
V
REGA
V
SS
V
BUF
TEST2
TEST
BUSSW
Formal name
Supply out
Not connected
Supply and
communication
Supply return
Definition
This pin is connected to the BUS_I pin through an internal sense resistor and provides the supply
connection to the next slave in a daisy-chain configuration. An external capacitor must be connected
between this pin and V
SS
. Reference
Figure 3.
This pin is not internally connected and must be left unconnected or tied to V
SS
in the application.
This pin is connected to the DSI supply line and supplies power to the device. An external capacitor must
be connected between this pin and BUSRTN. Reference
Figure 3.
This pin is the DSI supply return node.
Pulse code
If the PCM output is enabled, this pin provides a 4 MHz PCM signal proportional to the acceleration data
modulated output for test purposes. If PCM is unused, this pin must be left unconnected.
SPI clock
SPI data out
SPI data in
Internal
supply
Chip select
Internal
supply
Internal supply
return
Power supply
Test pin
Test pin
Bus switch gate
drive
Die attach pad
Corner pads
This input pin provides the serial clock to the SPI port for test purposes. An internal pull-down device is
connected to this pin. This pin must be grounded or left unconnected in the application.
This pin functions as the serial data output from the SPI port for test purposes. This pin must be left
unconnected in the application.
This pin functions as the serial data input to the SPI port for test purposes. An internal pull-down device
is connected to this pin. This pin must be grounded or left unconnected in the application.
This pin is connected to the power supply for the internal circuitry. An external capacitor must be
connected between this pin and V
SS
. Reference
Figure 3.
This input pin provides the chip select to the SPI port for test purposes. An internal pullup device is
connected to this pin. This pin must be left unconnected in the application.
This pin is connected to the power supply for the internal circuitry. An external capacitor must be
connected between this pin and V
SSA
. Reference
Figure 3.
This pin is the power supply return node for the internal power supplies and must be connected to
BUSRTN in this application.
This pin is connected to a buffer regulator for the internal circuitry. The buffer regulator supplies the
internal regulators to provide immunity from EMC and supply dropouts. An external capacitor must be
connected between this pin and V
SS
. Reference
Figure 3.
This pin is must be connected to V
SS
in the application.
This pin is must be connected to V
SS
in the application.
This pin is the drive for a high-side, daisy-chain switch. When switch is connected, daisy-chain mode is
used, this pin is connected to the gate of a p-channel FET which connects BUS_I to the next slave in the
daisy chain. An external pullup resistor is required on the gate of the p-channel FET. Reference
Section 3.6.4.
If unused, this pin must be left unconnected.
This pin is the die attach flag, and is internally connected to V
SS
. Reference
Section 6
for die attach pad
connection details.
The corner pads are internally connected to V
SS
.
17
PAD
Corner pads
MMA27XXW
4
Sensors
Freescale Semiconductor, Inc.
V
BUF
1.3
Application diagram
V
BUF
V
REG
V
REGA
C2
C3
C4
BUS_I
BUS_I
Optional for ESD
BUSIN
C1
D1
BUSRTN
V
SS
BUS_O
BUS_I
C6
R1
C5
BUSRTN
BUSOUT
BUSSW
Optional for
Daisy Chain
M1
BUSOUT
DC
Figure 3. MMA27XXW/17XXW application diagram
Table 2. External component recommendations
Ref Des
C1
C2
C3
C4
C5
C6
R1
M1
D1
Type
Ceramic
Ceramic
Ceramic
Ceramic
Ceramic
Ceramic
General purpose
P-channel MOSFET
Zener diode
MMBZ27Vxxxx or equivalent
Description
220 pF, 10%, 50 V minimum, X7R
1
μF,
10%, 10 V minimum, X7R
1
μF,
10%, 10 V minimum, X7R
1
μF,
10%, 10 V minimum, X7R
100 pF, 10%, 50 V minimum, X7R
100 pF, 10%, 50 V minimum, X7R
100 kΩ, 5%, 200 PPM
Purpose
BUSIN EMC and ESD protection. Capacitor value is dependent
on the DSI3 master device and must be chosen by the system
implementer.
Voltage regulator output capacitor
Voltage regulator output capacitor
Voltage regulator output capacitor
BUSOUT EMC and ESD protection
BUSOUT EMC and ESD protection
Pullup resistor for external high-side, daisy-chain FET
High-side, daisy-chain transistor
ESD protection diode
MMA27XXW
Sensors
Freescale Semiconductor, Inc.
5
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