DATASHEET
ISL80020, ISL80020A, ISL80015, ISL80015A
Compact Synchronous Buck Converters
The
ISL80020, ISL80020A, ISL80015
and
ISL80015A
are highly
efficient, monolithic, synchronous step-down DC/DC converters
that can deliver up to 2A of continuous output current from a 2.7V
to 5.5V input supply. They use peak current mode control
architecture to allow very low duty cycle operation. They operate
at either 1MHz or 2MHz switching frequency, thereby providing
superior transient response and allowing for the use of small
inductors. They have excellent stability.
The ISL80020, ISL80020A, ISL80015 and ISL80015A integrate
very low r
DS(ON)
MOSFETs in order to maximize efficiency. In
addition, since the high-side MOSFET is a PMOS, the need for a
Boot capacitor is eliminated, thereby reducing external
component count. They can operate at 100% duty cycle
(at 1MHz).
The device is configured in PWM (pulse width modulation) for
fast transient response, which helps reduce the output noise
and RF interference.
These devices are offered in a space saving 8 pin 2mmx2mm
TDFN lead free package with exposed pad for improved thermal
performance. The complete converter occupies less than
64mm
2
area.
FN6692
Rev 3.00
June 5, 2015
Features
• V
IN
range 2.7V to 5.5V
• I
OUT
maximum is 1.5A or 2A (see
Table 1 on page 2)
• Switching frequency is 1MHz or 2MHz (see
Table 1 on page 2)
• Overcurrent and short circuit protection
• Over-temperature/thermal protection
• Negative current protection
• Power-good and enable
• 100% duty cycle (1MHZ)
• Internal soft-start and soft-stop
• V
IN
undervoltage lockout and V
OUT
overvoltage protection
• Up to 95% peak efficiency
Applications
• General purpose POL
• Industrial, instrumentation, and medical equipment
• Telecom and networking equipment
• Game console
Related Literature
UG026,
“ISL800xxxDEMO1Z Demonstration Boards User
Guide”
ISL80015, ISL80020
VIN
GND
+2.7V...+5.5V
C1
22µF
2
1
VIN
PHASE
8
L1
+1.8V/2A
C2
22µF
7
VOUT
100
90
GND
EN
PGND
EFFICIENCY (%)
EN
3
SGND
NC
6
C3
22pF
R1
200kΩ 1%
R2
100kΩ 1%
80
70
60
50
2.5V
OUT
1.5V
OUT
1.8V
OUT
3.3V
OUT
PG
4
PG
EPAD
9
FB
5
0.6V
V
O
-
R
1
= R
2
----------- –
1
VFB
(EQ. 1)
40
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
OUTPUT LOAD (A)
FIGURE 1. TYPICAL APPLICATION CIRCUIT CONFIGURATION
FIGURE 2. EFFICIENCY vs LOAD, f
SW
= 2MHz, V
IN
= 5V, T
A
= +25°C
FN6692 Rev 3.00
June 5, 2015
Page 1 of 16
ISL80020, ISL80020A, ISL80015, ISL80015A
TABLE 1. SUMMARY OF KEY DIFFERENCES
PART#
ISL80015
ISL80015A
ISL80020
ISL80020A
I
OUT
(MAX)
(A)
1.5
1.5
2
2
f
SW
(MHz)
1
2
1
2
2.7 to 5.5
0.6 to 5.5
8 pin 2mmx2mm TDFN
V
IN
RANGE
(V)
V
OUT
RANGE
(V)
PACKAGE
SIZE
NOTE: In this datasheet, the parts listed in the table are collectively called “device”.
TABLE 2. COMPONENT VALUE SELECTION TABLE
V
OUT
(V)
0.8
1.2
1.5
1.8
2.5
3.3
C1
(µF)
22
22
22
22
22
22
C2
(µF)
22
22
22
22
22
22
C3
(pF)
22
22
22
22
22
22
L1
(µH)
1.0~2.2
1.0~2.2
1.0~2.2
1.0~3.3
1.5~3.3
1.5~4.7
R1
(kΩ)
33
100
150
200
316
450
R2
(kΩ)
100
100
100
100
100
100
FN6692 Rev 3.00
June 5, 2015
Page 2 of 16
ISL80020, ISL80020A, ISL80015, ISL80015A
Pin Configuration
ISL80020, ISL80020A, ISL80015, ISL80015A
(8 LD 2x2 TDFN)
TOP VIEW
VIN
EN
SGND
PG
1
2
3
4
8
7
6
5
PHASE
PGND
NC
FB
EPAD
(GND)
PAD
PIN 9
Pin Descriptions
PIN #
1
PIN NAME
VIN
PIN DESCRIPTION
The input supply for the power stage of the PWM regulator and the source for the internal linear regulator that provides
bias for the IC. Place a minimum of 10µF ceramic capacitance from VIN to GND and as close as possible to the IC for
decoupling.
Device enable input. When the voltage on this pin rises above 1.4V, the device is enabled. The device is disabled when
the pin is pulled to ground. When the device is disabled, a 100Ω resistor discharges the output through the PHASE pin.
See
Figure 3, “FUNCTIONAL BLOCK DIAGRAM” on page 4
for details.
Connect pin 3 to EPAD
Power-good output is pulled to ground during the soft-start interval and also when the output voltage is below regulation
limits. There is an internal 5MΩ internal pull-up resistor on this pin.
Feedback pin for the regulator. FB is the negative input to the voltage loop error amplifier. The output voltage is set by
an external resistor divider connected to FB. In addition, the power-good PWM regulator’s power-good and undervoltage
protection circuits use FB to monitor the output voltage.
Connect NC pin to EPAD
Power and analog ground connections. Connect directly to the board GROUND plane.
Power stage switching node for output voltage regulation. Connect to the output inductor. This pin is discharged by an
100Ω resistor when the device is disabled. See
Figure 3, “FUNCTIONAL BLOCK DIAGRAM” on page 4
for details.
The exposed pad must be connected to the PGND pin for proper electrical performance. Place as many vias as possible
under the pad connecting to the PGND plane for optimal thermal performance.
2
EN
3
4
5
SGND
PG
FB
6
7
8
9
NC
PGND
PHASE
E PAD
FN6692 Rev 3.00
June 5, 2015
Page 3 of 16
ISL80020, ISL80020A, ISL80015, ISL80015A
Functional Block Diagram
Soft
SOFT-
START
27pF
200kΩ
+
VIN
SHUTDOWN
BANDGAP
SHUTDOWN
3pF
+
FB
1.15*VREF
6kΩ
-
+
OV
+
OCP
-
0.85*VREF
VIN
5MΩ
PG
1ms
DELAY
+
UV
-
SLOPE
Slope
COMP
0.3V
FN6692 Rev 3.00
June 5, 2015
+
-
-
EN
VREF
EAMP
+
-
COMP
OSCILLATOR
P
PWM
LOGIC
CONTROLLER
PROTECTION
HS DRIVER
PHASE
N
PGND
+
CSA
-
NEG CURRENT
SENSING
SCP
+
SHUTDOWN
100Ω
FIGURE 3. FUNCTIONAL BLOCK DIAGRAM
Page 4 of 16
ISL80020, ISL80020A, ISL80015, ISL80015A
Ordering Information
PART NUMBER
(Notes
1, 2, 3)
ISL80020IRZ-T
ISL80020IRZ-T7A
ISL80020AIRZ-T
ISL80020AIRZ-T7A
ISL80015IRZ-T
ISL80015IRZ-T7A
ISL80015AIRZ-T
ISL80015AIRZ-T7A
ISL80020FRZ-T
ISL80020FRZ-T7A
ISL80020AFRZ-T
ISL80020AFRZ-T7A
ISL80015FRZ-T
ISL80015FRZ-T7A
ISL80015AFRZ-T
ISL80015AFRZ-T7A
NOTES:
1. Please refer to
TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for
ISL80020, ISL80020A, ISL80015, ISL80015A.
For more information on
MSL please see techbrief
TB363.
TAPE AND REEL
QUANTITY
1000
250
1000
250
1000
250
1000
250
1000
250
1000
250
1000
250
1000
250
PART
MARKING
020
020
20A
20A
015
015
A15
A15
20F
20F
0AF
0AF
15F
15F
5AF
5AF
TECHNICAL
SPECIFICATIONS
2A, 1MHz
2A, 1MHz
2A, 2MHz
2A, 2MHz
1.5A, 1MHz
1.5A, 1MHz
1.5A, 2MHz
1.5A, 2MHz
2A, 1MHz
2A, 1MHz
2A, 2MHz
2A, 2MHz
1.5A, 1MHz
1.5A, 1MHz
1.5A, 2MHz
1.5A, 2MHz
TEMP. RANGE
(°C)
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
PACKAGE
Tape and Reel
(RoHS Compliant)
8 Ld TDFN
8 Ld TDFN
8 Ld TDFN
8 Ld TDFN
8 Ld TDFN
8 Ld TDFN
8 Ld TDFN
8 Ld TDFN
8 Ld TDFN
8 Ld TDFN
8 Ld TDFN
8 Ld TDFN
8 Ld TDFN
8 Ld TDFN
8 Ld TDFN
8 Ld TDFN
PKG.
DWG. #
L8.2x2C
L8.2x2C
L8.2x2C
L8.2x2C
L8.2x2C
L8.2x2C
L8.2x2C
L8.2x2C
L8.2x2C
L8.2x2C
L8.2x2C
L8.2x2C
L8.2x2C
L8.2x2C
L8.2x2C
L8.2x2C
FN6692 Rev 3.00
June 5, 2015
Page 5 of 16
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