4. Switching characteristics are independent of operating junction temperature.
V
SD
V
−
−
−
−
−
−
0.76
−
104
42
62
0.20
1.2
−
−
−
−
−
mC
ns
(V
DD
= 16 Vdc, I
D
= 2.8 Adc,
V
gs
= 4.5 V, R
G
= 2.3
W)
t
d(on)
t
r
t
d(off)
t
f
Q
T
Q
gs
Q
gd
−
−
−
−
−
−
−
6.0
95
28
125
3.5
0.6
1.5
−
−
−
−
−
−
−
nC
ns
(V
DS
= 5.0 Vdc, V
GS
= 0 V,
f = 1.0 MHz)
C
iss
C
oss
C
rss
−
−
−
150
130
45
−
−
−
pF
V
GS(th)
0.5
−
−
−
−
−2.3
78
105
1.0
−
85
115
Vdc
mV/°C
mW
V
(BR)DSS
20
−
−
−
−
−
22
−
−
−
−
−
1.0
10
"100
Vdc
mV/°C
mAdc
Symbol
Min
Typ
Max
Unit
I
DSS
I
GSS
nA
R
DS(on)
t
rr
t
a
t
b
Q
RR
ORDERING INFORMATION
Device
MGSF2N02ELT1G
MVSF2N02ELT1G
Package
SOT−23
(Pb−Free)
SOT−23
(Pb−Free)
Shipping
†
3,000 / Tape & Reel
3,000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
2
MGSF2N02EL, MVSF2N02EL
8
I
D
, DRAIN CURRENT (AMPS)
V
GS
= 10 V
V
GS
= 7 V
V
GS
= 5 V
V
GS
= 2.6 V
4
V
GS
= 3 V
2
T
J
= 25°C
I
D
, DRAIN CURRENT (AMPS)
V
GS
= 2.2 V
V
GS
= 2.0 V
V
GS
= 1.8 V
V
GS
= 1.6 V
V
GS
= 1.2 V
0
0
0.5
1
1.5
2
2.5
0
0
0.5
1
1.5
2
2.5
3
5
4
3
2
T
J
= 100°C
1
V
DS
w
10 V
6
T
J
= 55°C
Figure 1. On−Region Characteristics
0.12
R
DS(on)
, DRAIN−TO−SOURCE
RESISTANCE (W)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 2. Transfer Characteristics
0.3
R
DS(on)
, DRAIN−TO−SOURCE
RESISTANCE (W)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
T
J
= 25°C
I
D
= 3.6 A
T
J
= 25°C
0.10
0.08
0.06
0.04
0.02
0.2
0.1
V
GS
= 2.5 V
0
0
2
4
6
8
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
4
5
6
7
8
−I
D
, DRAIN CURRENTS (AMPS)
Figure 3. On−Resistance vs. Gate−to−Source Voltage
Figure 4. On−Resistance vs. Gate Voltage
1.8
R
DS(on)
, DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
I
D
= 3.6 A
V
GS
= 4.5 V
10000
V
GS
= 0 V
I
DSS
, LEAKAGE (nA)
T
J
= 150°C
1000
1.5
1.2
0.9
100
T
J
= 100°C
0.6
−50
−25
0
25
50
75
100
125
150
10
4
8
12
16
20
T
J
, JUNCTION TEMPERATURE (°C)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with Temperature
Figure 6. Drain−to−Source Leakage
Current vs. Voltage
http://onsemi.com
3
MGSF2N02EL, MVSF2N02EL
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
350
300
C, CAPACITANCE (pF)
250
200
150
100
50
0
0
4
8
12
16
20
Ciss
Coss
Crss
T
J
= 25°C
5
QT
4
3
Q1
2
1
0
Q2
−VDS,
DRAIN−TO−SOURCE VOLTAGE (VOLTS)
I
D
= 3.6 A
T
J
= 25°C
0
1
2
Qg, TOTAL GATE CHARGE, (nC)
3
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
1000
Figure 8. Gate−to−Source Voltage vs. Total Charge
1.8
I
S
, SOURCE CURRENT (AMPS)
V
DD
= 16 V
I
D
= 2.8 A
V
GS
= 4.5 V
t
f
t
r
t
d(off)
1.5
1.2
0.9
0.6
0.3
V
GS
= 4.5 V
T
J
= 25°C
t, TIME (ns)
100
10
t
d(on)
1
1
10
R
G
, GATE RESISTANCE (W)
100
0
0.20
0.30
0.40
0.50
0.60
0.70
0.80
0.90
1.00
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation vs.
Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
http://onsemi.com
4
MGSF2N02EL, MVSF2N02EL
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AP
D
SEE VIEW C
3
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
DIM
A
A1
b
c
D
E
e
L
L1
H
E
q
MIN
0.89
0.01
0.37
0.09
2.80
1.20
1.78
0.10
0.35
2.10
0
°
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.13
0.18
2.90
3.04
1.30
1.40
1.90
2.04
0.20
0.30
0.54
0.69
2.40
2.64
−−−
10
°
MIN
0.035
0.001
0.015
0.003
0.110
0.047
0.070
0.004
0.014
0.083
0
°
INCHES
NOM
0.040
0.002
0.018
0.005
0.114
0.051
0.075
0.008
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.007
0.120
0.055
0.081
0.012
0.029
0.104
10
°
E
1
2
HE
c
e
b
q
0.25
A
A1
L
L1
VIEW C
STYLE 21:
PIN 1. GATE
2. SOURCE
3. DRAIN
SOLDERING FOOTPRINT*
0.95
0.037
0.95
0.037
2.0
0.079
0.9
0.035
SCALE 10:1
0.8
0.031
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent
rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.
Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries,
affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury
or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an
Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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