IMPORTANT NOTICE
Dear customer,
As from August 2
nd
2008, the wireless operations of NXP have moved to a new company,
ST-NXP Wireless.
As a result, the following changes are applicable to the attached document.
●
Company name - Philips Semiconductors
is replaced with
ST-NXP Wireless.
Copyright
- the copyright notice at the bottom of each page “© Koninklijke Philips
Electronics N.V. 200x. All rights reserved”, shall now read: “© ST-NXP Wireless 200x -
All rights reserved”.
Web site
-
http://www.semiconductors.philips.com
is replaced with
http://www.stnwireless.com
Contact information
- the list of sales offices previously obtained by sending an email
to
sales.addresses@www.semiconductors.philips.com,
is now found at
http://www.stnwireless.com
under Contacts.
●
●
●
If you have any questions related to the document, please contact our nearest sales office.
Thank you for your cooperation and understanding.
ST-NXP Wireless
www.stnwireless.com
ISP1181B
Full-speed Universal Serial Bus peripheral controller
Rev. 02 — 07 December 2004
Product data
1. General description
The ISP1181B is a Universal Serial Bus (USB) peripheral controller that complies
with
Universal Serial Bus Specification Rev. 2.0,
supporting data transfer at full-speed
(12 Mbit/s). It provides full-speed USB communication capacity to microcontroller or
microprocessor-based systems. The ISP1181B communicates with the system’s
microcontroller or microprocessor through a high-speed general-purpose parallel
interface.
The ISP1181B supports fully autonomous, multi-configurable Direct Memory Access
(DMA) operation.
The modular approach to implementing a USB peripheral controller allows the
designer to select the optimum system microcontroller from the wide variety available.
The ability to reuse existing architecture and firmware investments shortens
development time, eliminates risks and reduces costs. The result is fast and efficient
development of the most cost-effective USB peripheral solution.
The ISP1181B is ideally suited for application in many personal computer peripherals
such as printers, communication devices, scanners, external mass storage (Zip
®
drive) devices and digital still cameras. It offers an immediate cost reduction for
applications that currently use SCSI implementations.
2. Features
s
Complies with
Universal Serial Bus Specification Rev. 2.0
and most Device Class
specifications
s
Supports data transfer at full-speed (12 Mbit/s)
s
High performance USB peripheral controller with integrated Serial Interface
Engine (SIE), FIFO memory, transceiver and 3.3 V voltage regulator
s
High speed (11.1 Mbyte/s or 90 ns read/write cycle) parallel interface
s
Fully autonomous and multi-configuration DMA operation
s
Up to 14 programmable USB endpoints with 2 fixed control IN/OUT endpoints
s
Integrated physical 2462 bytes of multi-configuration FIFO memory
s
Endpoints with double buffering to increase throughput and ease real-time data
transfer
s
Seamless interface with most microcontrollers/microprocessors
s
Bus-powered capability with low power consumption and low ‘suspend’ current
s
6 MHz crystal oscillator input with integrated PLL for low EMI
s
Controllable LazyClock (100 kHz
±
50 %) output during ‘suspend’
s
Software controlled connection to the USB bus (SoftConnect™)
s
Good USB connection indicator that blinks with traffic (GoodLink™)
Philips Semiconductors
ISP1181B
Full-speed USB peripheral controller
Clock output with programmable frequency (up to 48 MHz)
Complies with the ACPI™, OnNow™ and USB power management requirements
Internal power-on and low-voltage reset circuit, with possibility of a software reset
Operation over the extended USB bus voltage range (4.0 V to 5.5 V) with 5 V
tolerant I/O pads
s
Operating temperature range
−40 °C
to
+85 °C
s
Full-scan design with high fault coverage
s
Available in TSSOP48 and HVQFN48 packages.
s
s
s
s
3. Applications
s
Personal Digital Assistant (PDA)
s
Digital camera
s
Communication device, for example:
x
Router
x
Modem
s
Mass storage device, for example:
x
Zip drive
s
Printer
s
Scanner.
4. Ordering information
Table 1:
Ordering information
Package
Name
ISP1181BDGG
ISP1181BBS
TSSOP48
HVQFN48
Description
Plastic thin shrink small outline package; 48 leads; body width 6.1 mm
Plastic thermal enhanced very thin quad flat package; no leads;
48 terminals; body 7
×
7
×
0.85 mm
Version
SOT362-1
SOT619-2
Type number
9397 750 13958
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 02 — 07 December 2004
2 of 70
xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx
xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx
xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x
Product data
Rev. 02 — 07 December 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9397 750 13958
5. Block diagram
Philips Semiconductors
to/from USB
D+
D− VBUS
sense
input
5
3.3 V
1.5
kΩ
SoftConnect
4
6
GL
to LED
7
HUB
GoodLink
6 MHz
CLKOUT
XTAL1
48
XTAL2
47
48
MHz
PROGR.
DIVIDER
DMA
HANDLER
45
11
DREQ
EOT, DACK
2
10, 12
17
18
to/from
microcontroller
BUS_CONF0
BUS_CONF1
PLL
OSCILLATOR
BIT CLOCK
RECOVERY
ANALOG
Tx/Rx
PHILIPS
SIE
MEMORY
MANAGEMENT
UNIT
MICRO
CONTROLLER
HANDLER
38, 35 to 27,
24 to 19 16
BUS
INTERFACE
43 to 39
5
AD0,
DATA1 to DATA9,
DATA10 to DATA15
CS, ALE, WR,
RD, A0
RESET
44
POWER-ON
RESET
internal
reset
INTEGRATED
RAM
ENDPOINT
HANDLER
15
INT
VCC
1
VOLTAGE
REGULATOR
3.3 V
3.3 V
INTERNAL
SUPPLY
I/O PIN
SUPPLY
Full-speed USB peripheral controller
ISP1181B
2
3
9
8
25, 36, 46
3
37
26
004aaa134
REGGND
Vreg(3.3)
SUSPEND WAKEUP
GND
VCC(3.3)
Vref
ISP1181B
Fig 1. Block diagram.
3 of 70
Philips Semiconductors
ISP1181B
Full-speed USB peripheral controller
6. Pinning information
6.1 Pinning
VCC 1
REGGND 2
Vreg(3.3) 3
D− 4
D+ 5
VBUS 6
GL 7
WAKEUP 8
SUSPEND 9
EOT 10
DREQ 11
DACK 12
48 XTAL1
47 XTAL2
46 GND
45 CLKOUT
44 RESET
43 CS
42 ALE
41 WR
40 RD
39 A0
38 AD0
37 VCC(3.3)
ISP1181BDGG
TEST1
13
TEST2
14
INT 15
TEST3
16
BUS_CONF0 17
BUS_CONF1 18
DATA15 19
DATA14 20
DATA13 21
DATA12 22
DATA11 23
DATA10 24
004aaa135
36 GND
35 DATA1
34 DATA2
33 DATA3
32 DATA4
31 DATA5
30 DATA6
29 DATA7
28 DATA8
27 DATA9
26 Vref
25 GND
Fig 2. Pin configuration TSSOP48.
9397 750 13958
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 02 — 07 December 2004
4 of 70
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
