PD - 95126
IRL3502SPbF
HEXFET
®
Power MOSFET
Advanced Process Technology
l
Surface Mount
l
Optimized for 4.5V-7.0V Gate Drive
l
Ideal for CPU Core DC-DC Converters
l
Fast Switching
l
Lead-Free
Description
l
D
V
DSS
= 20V
R
DS(on)
= 0.007Ω
G
S
I
D
= 110A
These HEXFET Power MOSFETs were designed
specifically to meet the demands of CPU core DC-DC
converters in the PC environment. Advanced
processing techniques combined with an optimized
gate oxide design results in a die sized specifically to
offer maximum efficiency at minimum cost.
The D
2
Pak is a surface mount power package capable
of accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D
2
Pak is suitable for high current applications because
of its low internal connection resistance and can
dissipate up to 2.0W in a typical surface mount
application.
D
2
Pak
Absolute Maximum Ratings
Parameter
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
C
= 25°C
V
GS
V
GSM
E
AS
I
AR
E
AR
dv/dt
T
J
T
STG
Continuous Drain Current, V
GS
@ 4.5V
Continuous Drain Current, V
GS
@ 4.5V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Gate-to-Source Voltage
(Start Up Transient, tp = 100µs)
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
110
67
420
140
1.1
± 10
14
390
64
14
5.0
-55 to + 150
300 (1.6mm from case )
Units
A
W
W/°C
V
V
mJ
A
mJ
V/ns
°C
Thermal Resistance
Parameter
R
θJC
R
θJA
Junction-to-Case
Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
Max.
0.89
40
Units
°C/W
3/18/04
IRL3502SPbF
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
V
(BR)DSS
Drain-to-Source Breakdown Voltage
∆V
(BR)DSS
/∆T
J
Breakdown Voltage Temp. Coefficient
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
S
C
iss
C
oss
C
rss
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min.
20
0.70
77
Max. Units
Conditions
V
V
GS
= 0V, I
D
= 250µA
V/°C Reference to 25°C, I
D
= 1.0mA
0.008
V
GS
= 4.5V, I
D
= 64A
Ω
0.007
V
GS
= 7.0V, I
D
= 64A
V
V
DS
= V
GS
, I
D
= 250µA
S
V
DS
= 10V, I
D
= 64A
25
V
DS
= 20V, V
GS
= 0V
µA
250
V
DS
= 10V, V
GS
= 0V, T
J
= 150°C
100
V
GS
= 10V
nA
-100
V
GS
= -10V
110
I
D
= 64A
27
nC V
DS
= 16V
39
V
GS
= 4.5V, See Fig. 6
V
DD
= 10V
I
D
= 64A
ns
R
G
= 3.8Ω, V
GS
= 4.5V
R
D
= 0.15Ω,
Between lead,
nH
7.5
and center of die contact
4700
V
GS
= 0V
1900
pF
V
DS
= 15V
640
= 1.0MHz, See Fig. 5
Typ.
0.019
10
140
96
130
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Notes:
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
110
showing the
A
G
integral reverse
420
S
p-n junction diode.
1.3
V
T
J
= 25°C, I
S
= 64A, V
GS
= 0V
87 130
ns
T
J
= 25°C, I
F
= 64A
200 310
nC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Repetitive rating; pulse width limited by
Starting T
J
= 25°C, L = 190µH
max. junction temperature.
R
G
= 25Ω, I
AS
= 64A.
I
SD
≤
64A, di/dt
≤
86A/µs, V
DD
≤
V
(BR)DSS
,
T
J
≤
150°C
Pulse width
≤
300µs; duty cycle
≤
2%.
Uses IRL3502 data and test conditions
Calculated continuous current based on maximum allowable
junction temperature; for recommended current-handling of the
package refer to Design Tip # 93-4
** When mounted on FR-4 board using minimum recommended footprint.
For recommended footprint and soldering techniques refer to application note #AN-994.
`
IRL3502SPbF
1000
VGS
7.00V
5.00V
4.50V
3.50V
3.00V
2.70V
2.50V
BOTTOM 2.25V
TOP
1000
100
I
D
, Drain-to-Source Current (A)
I
D
, Drain-to-Source Current (A)
VGS
7.00V
5.00V
4.50V
3.50V
3.00V
2.70V
2.50V
BOTTOM 2.25V
TOP
100
2.25V
2.25V
10
0.1
20µs PULSE WIDTH
T
J
= 25
°
C
1
10
100
10
0.1
20µs PULSE WIDTH
T
J
= 150
°
C
1
10
100
V
DS
, Drain-to-Source Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
1000
2.0
T
J
= 25
°
C
T
J
= 150
°
C
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
I
D
= 110A
I
D
, Drain-to-Source Current (A)
1.5
100
1.0
0.5
10
V DS = 15V
20µs PULSE WIDTH
2
3
4
5
6
0.0
-60 -40 -20
V
GS
= 4.5V
0
20
40
60
80 100 120 140 160
V
GS
, Gate-to-Source Voltage (V)
T
J
, Junction Temperature (
°
C)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
IRL3502SPbF
8000
V
GS
, Gate-to-Source Voltage (V)
V
GS
= 0V,
f = 1MHz
C
iss
= C
gs
+ C
gd ,
C
ds
SHORTED
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
15
I
D
=
64A
V
DS
= 16V
C, Capacitance (pF)
6000
12
Ciss
4000
9
Coss
2000
6
Crss
0
3
1
10
100
0
0
40
80
120
160
V
DS
, Drain-to-Source Voltage (V)
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
I
SD
, Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10us
100
T
J
= 150
°
C
I
D
, Drain Current (A)
100
100us
T
J
= 25
°
C
1ms
10
0.5
V
GS
= 0 V
1.0
1.5
2.0
2.5
10
T
C
= 25 ° C
T
J
= 150 ° C
Single Pulse
1
10
10ms
100
V
SD
,Source-to-Drain Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
IRL3502SPbF
120
800
LIMITED BY PACKAGE
100
E
AS
, Single Pulse Avalanche Energy (mJ)
TOP
600
BOTTOM
ID
29A
40A
64A
I
D
, Drain Current (A)
80
60
400
40
200
20
0
25
50
T
C
, Case Temperature ( °C)
75
100
125
150
0
25
Starting T
J
, Junction Temperature (
°
C)
50
75
100
125
150
Fig 9.
Maximum Drain Current Vs.
Case Temperature
Fig 10.
Maximum Avalanche Energy
Vs. Drain Current
1
Thermal Response (Z
thJC
)
D = 0.50
0.20
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
P
DM
t
1
t
2
Notes:
1. Duty factor D = t
1
/ t
2
2. Peak T
J
= P
DM
x Z
thJC
+ T
C
0.0001
0.001
0.01
0.1
1
0.1
0.01
0.00001
t
1
, Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
