SCOPE:
MICROPROCESSOR SUPERVISORY CIRCUITS
Generic Number
MAX690(x)/883B
MAX691(x)/883B
MAX692(x)/883B
MAX693(x)/883B
MAX694(x)/883B
MAX695(x)/883B
Device Type
01
02
03
04
05
06
Case Outline(s).
The case outlines shall be designated in Mil-Std-1835 and as follows:
Case Outline
Package Code
Outline Letter
Mil-Std-1835
MAXIM SMD
JA
P
GDIP1-T08 or CDIP2-T08
8 LEAD CERDIP
J08
JE
E
GDIP1-T16 or CDIP2-T16
16 LEAD CERDIP
J16
FB
X
CDFP3-F10
10 LEAD Flatpack
F10
LP
2
CQCC1-N20
20 Pin Leadless Chip
L20
Absolute Maximum Ratings
Terminal Voltage (with respect to GND)
V
CC
.................................................................................................................. -0.3V to +6.0V
V
BATT
................................................................................................................ -0.3V to+6.0V
All other Inputs 1/ ................................................................................. -0.3V to (V
OUT
+0.5V)
Input Current
V
CC
............................................................................................................................... 200mA
V
BATT
.............................................................................................................................. 50mA
GND ............................................................................................................................... 20mA
Output Current
V
OUT
.................................................................................................. Short-circuit protected
All other outputs ........................................................................................................... 20mA
Rate of Rise, V
CC
, V
BATT
................................................................................................ 100V/µs
Lead Temperature (soldering, 10 seconds) ...................................................................... +300°C
Storage Temperature ......................................................................................... -65°C to +160°C
Continuous Power Dissipation ................................................................................... T
A
=+70°C
8 lead CERDIP(derate 8.0mW/°C above +70°C) ..................................................... 640mW
16 lead CERDIP(derate 10.0mW/°C above +70°C) ................................................. 800mW
10 lead Flatpack(derate 5.3mW/°C above +70°C) ................................................... 421mW
20 lead LCC(derate 9.1mW/°C above +70°C) ......................................................... 727mW
Junction Temperature T
J
............................................................................................ +150°C
Thermal Resistance, Junction to Case,
ΘJC:
Case Outline 8 lead CERDIP..................................................................... 55°C/W
Case Outline 16 lead CERDIP................................................................... 50°C/W
Case Outline 10 lead Flatpack .................................................................. 85°C/W
Case Outline 20 leadless Chip carrier ....................................................... 20°C/W
Thermal Resistance, Junction to Ambient,
ΘJA:
Case Outline 8 lead CERDIP................................................................... 125°C/W
Case Outline 16 lead CERDIP................................................................. 100°C/W
Case Outline 10 lead Flatpack ................................................................ 190°C/W
Case Outline 20 leadless Chip carrier ..................................................... 110°C/W
NOTE 1: The input voltage limits on PFI and WDI may be exceeded if the input current is less than 10mA.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
----------------------------
Electrical Characteristics of MAX690/691/692/693/694
/695/883B for /883B and SMD 5962-90711 and 5962-90712
19-2553
Page 2 of
Rev. C
8
Recommended Operating Conditions
Ambient Operating Range (T
A
) ............................................................... -55°C to
+125°C
Supply Voltage Range (V
CC
) DASH 03 & 04 ............................................ +4.5V to +5.5V
Supply Voltage Range (V
CC
) DASH 01, 02, 05, 06 ................................. +4.75V to +5.5V
TABLE 1. ELECTRICAL TESTS:
CONDITIONS
-55
°C ≤T
A
≤+125°C
2/
Unless otherwise specified
TEST
Symbol
Group A
Subgroup
Device
type
Limits
Min
Limits
Max
Units
BATTERY-BACKUP SWITCHING
Operating Voltage
Range
V
CC
1,2,3
01,02,
05,06
03,04
01,02,
05,06
03,04
4.75
5.5
V
Operating Voltage
Range
4.5
2.0
5.5
4.25
V
V
BATT
1,2,3
Output Voltage
V
OUT
I
OUT
=1mA
1,2,3
All
All
I
OUT
=50mA
I
OUT
=250µA, V
CC
<V
BATT
-0.2V
I
OUT
=1mA
2.0
V
CC
-0.3
V
CC
-0.5
VBATT-
0.1
4.0
V
V
Output Voltage-
Battery-Backup
Mode
Supply Current
(Excludes I
OUT
)
BATT
OUT
1,2,3
1
2,3
All
1
2,3
1
2,3
1
2,3
1,2,3
5
7
mA
10
15
1
10
-0.10
-1.00
-200
+0.02
+0.02
+200
µA
µA
mV
I
CC
I
OUT
=50mA
I
BATT
Supply Current in
V
CC
=0V, V
BATT
=2.8V
Battery-Backup
Mode
Battery Standby
BATT
5.5V>V
CC
>V
BATT
+1V
Current
SBI
+=Discharge, -=Charge
Battery-
BATT
Power-Up or Power-Down
Switchover,
SW
TH
Threshold, V
CC
to
V
BATT
BATT ON Output
BATT
I
SINK
=3.2mA
Voltage
ON
OUT
BATT
BATT ON Output
BATT ON = V
OUT
ON
IOS
Short-Circuit
Current
BATT ON =0V Source Current
RESET AND WATCHDOG TIMING
Reset Voltage
R
TH
Threshold
All
All
All
1,2,3
02,04,06
0.4
60
V
mA
µA
1,2,3
02,04,06
0.1
01,02,
05,06
4.5
25
4.75
V
03,04
All
01,02
03,04
05,06
4.25
4.5
250
70
78
280
310
mV
1,2,3
Reset Threshold
Hysteresis
Reset Timeout
Delay
RT
HH
1,2,3
9
10,11
9
10,11
R
DEL
OSC SEL High, V
CC
=5V
35
31
140
126
ms
----------------------------
Electrical Characteristics of MAX690/691/692/693/694
/695/883B for /883B and SMD 5962-90711 and 5962-90712
19-2553
Page 3 of
Rev. C
8
TEST
Symbol
CONDITIONS
-55
°C ≤T
A
≤+125°C
2/
Unless otherwise specified
Group A
Subgroup
Device
type
Limits
Min
Limits
Max
Units
POWER-FAIL DETECTOR
PFI Input
PFI
VTH
Threshold
PFI Input Current
PFII
IN
___
___
PFO Output
PFO
VOH
Voltage High
___
___
PFO
VOL
PFO Output
Voltage Low
___
___
PFO
IOS
PFO Short-Circuit
Source Current
CHIP-ENABLE GATING
__
__
CE IN Thresholds
CEV
IL
Logic Low
__
__
CE IN Thresholds
CEV
IH
Logic High
__
__
CE IN
PI
CE IN Pull-Up
Current
__
__
CE
VOH
CE OUT Output
Voltage High
__
CE Output Voltage
Low
__
CE Propagation
Delay
OSCILLATOR
OSC IN Input
Current Pull-Up
OSC SEL Input
Pull-Up Current
OSC IN Frequency
Range
OSC IN Frequency
with External
Capacitor
__
CE
VOL
___
t
PDCE
V
CC
=5V
1,2,3
1,2,3
All
All
All
1.2
-25
3.5
1.4
25
V
nA
V
I
SOURCE
=1µA, V
CC
=5V
I
SINK
=3.2mA
I
SINK
=1.6mA
___
PFI=V
IH
, PFO=0V
1,2,3
1
0.4
All
V
0.4
µA
2,3
1,2,3
All
1.0
25
1
02,04,06
2,3
1
02,04,06
2,3
1,2,3
I
SOURCE
=3.0mA,
V
CC
=4.75V
I
SOURCE
=1µA, V
CC
=0V
I
SINK
=3.2mA
I
SINK
=1.6mA
V
CC
=5V
10,11
02,04,06
4.0
1.0
V
OUT
-1.5
1,2,3
02,04,06
V
OUT
-0.05
1
02,04,06
2,3
9
02,04,06
0.8
V
0.4
3.0
V
µA
V
25
0.4
V
0.4
200
ns
300
02,04,06
02,04,06
02,04,06
02,04,06
1
0
4
25
25
250
µA
µA
kHz
kHz
OSCI
IN
OSC
SEL
IN
OSC
INfrq
OSC
IN
1,2,3
1,2,3
OSC SEL=0V
OSC SEL=0V, COSC=47pF
NOTE 4
9,10,11
9
NOTE 2: V
CC
=full operating range, V
BATT
=+2.8V.
NOTE 3: WDI is guaranteed to be in the mid-level (inactive) state if WDI is floating and V
CC
is in the operating
range. WDI is internally biased to 38% of V
CC
with an impedance of approximately 125kΩ
NOTE 4: Typical for design purposes only but not tested. Guaranteed for SMD 5962-90711 and 5962-90712.
----------------------------
Electrical Characteristics of MAX690/691/692/693/694
/695/883B for /883B and SMD 5962-90711 and 5962-90712
19-2553
Page 5 of
Rev. C
8
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