SM5168 series
PLL Synthesizer IC
OVERVIEW
The SM5168 series are PLL synthesizer ICs fabricated using NPC’s Molybdenum-gate CMOS process. They
provide several combinations of reference and comparator frequency divider ratios, set in master-slice, making
them ideal for frequency synthesizers in IF stages of mobile communications devices. They also feature a lock
detect signal output (LD).
FEATURES
I
I
PACKAGE DIMENSIONS
(Unit: mm)
I
I
I
I
I
I
0.10
0.22 ± 0.1
0.1 ± 0.05
2.7 to 3.6V operating supply voltage range
Maximum operating frequency
• SM5168A× series: 200MHz, V
DD
= 2.7V
• SM5168C
×
series: 340MHz, V
DD
= 2.7V
Operating current consumption
• SM5168A× series: 3.3mA
(typ, 200MHz at 0.3Vp-p, V
DD
= 3.0 V)
• SM5168C× series: 4mA
(typ, 340MHz at 0.3Vp-p, V
DD
= 3.0 V)
SM5168A× (built-in standby function) and
SM168C× (dual frequency divider ratios) series
available, as set by master-slice
Charge pump output with output polarity for con-
nection to passive filter
Lock detect function output
−30
to 85°C operating temperature range
8-pin plastic VSOP
4.4 ± 0.2
6.4 ± 0.3
0.575 typ
3.1 ± 0.3
1.15 ± 0.05
0.15
−
0.05
+0.1
0.65
0.12
M
APPLICATIONS
I
I
I
Mobile communications
Portable telephones
Related applications
SERIES CONFIGURATION
Version
SM5168A× series
SM5168C× series
Maximum operating
frequency
200MHz
340MHz
Reference/comparator
frequency dividers
1
2
Frequency divider ratio range
1
Standby function
N counter
272 to 65535
272 to 65535
R counter
5 to 65535
5 to 65535
Yes
No
1. SM5168C× series: Dual frequency divider ratios are set within the ratio ranges.
ORDERING INFORMATION
Device
SM5168××V
Package
8-pin VSOP
SEIKO NPC CORPORATION —1
0.5 ± 0.2
SM5168 series
PINOUT
(Top view)
SM5168A× series
SM5168C× series
VDD
1
DO
2
VSS
3
FIN
4
8
7
6
5
XIN
LD
TEST
VDD
1
DO
2
VSS
3
FIN
4
8
7
6
5
XIN
LD
TEST
OPR
TR
PIN DESCRIPTION
Number
1
2
3
4
Name
VDD
DO
VSS
FIN
OPR
(SM5168A× series)
5
TR
(SM5168C× series)
6
7
8
TEST
LD
XIN
I
O
I
I
Frequency divider switching control.
Switches between 2 sets of reference and comparator frequency dividers.
Test pin.
Leave open or connect to VSS for normal operation.
Unlock signal output pin. (Unlocked when LOW)
Reference frequency divider (R-counter) external clock input pin.
Feedback resistor built-in, so input can be AC-coupled.
I/O
–
O
–
I
2.7 to 3.6V supply
Phase comparator error signal three-state output pin.
Built-in charge pump means that this output can be connected to a low-pass filter. The output
polarity is preset for connection to a passive filter.
Ground pin
Phase comparator frequency divider (N-counter) signal input pin.
Feedback resistor built-in, so input can be AC-coupled.
Power-save control pin.
Start when HIGH, standby mode when LOW.
Description
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SM5168 series
BLOCK DIAGRAMS
SM5168A× series
XIN
R-counter (64)
FR
OPR
TEST
FIN
Control
Circuit
Phase
Detector
Charge
Pump
DO
N-counter (890)
FV
Lock
Detector
LD
SM5168C× series
XIN
R-counter
FR
TR
TEST
FIN
Decoder
Phase
Detector
Charge
Pump
DO
N-counter
FV
Lock
Detector
LD
SEIKO NPC CORPORATION —3
SM5168 series
SPECIFICATIONS
Absolute Maximum Ratings
V
SS
= 0V
Parameter
Supply voltage
Input voltage range
Storage temperature range
Power dissipation
Symbol
V
DD
V
IN
T
STG
P
D
Rating
−0.3
to 6.0
V
SS
−
0.3 to V
DD
+ 0.3
−55
to 125
100
Unit
V
V
°C
mW
Recommended Operating Conditions
V
SS
= 0V
Parameter
Supply voltage
Operating temperature range
Symbol
V
DD
T
OPR
Rating
2.7 to 3.6
−30
to 85
Unit
V
°C
SEIKO NPC CORPORATION —4
SM5168 series
Electrical Characteristics
V
SS
= 0V, V
DD
= 2.7 to 3.6V, Ta =
−30
to 85°C unless otherwise noted.
Rating
Parameter
Supply voltage
VDD operating current consumption 1
(SM5168A× series)
VDD operating current consumption 2
(SM5168C× series)
FIN maximum operating frequency 1
(SM5168A× series)
XIN maximum operating frequency 1
(SM5168A× series)
FIN maximum operating frequency 2
(SM5168C× series)
XIN maximum operating frequency 2
(SM5168C× series)
FIN minimum operating input frequency
FIN AC-coupled input voltage range
XIN AC-coupled input voltage range
OPR, TR LOW-level input voltage
OPR, TR HIGH-level input voltage
XIN LOW-level input current
FIN LOW-level input current
XIN HIGH-level input current
FIN HIGH-level input current
OPR, TR LOW-level input leakage current
OPR, TR HIGH-level input leakage current
DO, LD LOW-level output voltage
DO, LD HIGH-level output voltage
DO, LD LOW-level output current
DO, LD HIGH-level output current
DO three-state output high-impedance
leakage current
Note 1.
Note 2.
Note 3.
Symbol
V
DD
I
DD1
Note 1.
V
DD
= 3.0V
V
DD
= 3.3V
Note 2.
300mVp-p sine wave.
Note 3.
300mVp-p sine wave
Note 3.
300mVp-p sine wave
Note 3.
300mVp-p sine wave
Note 3.
300mVp-p sine wave
Note 3.
340MHz
20MHz
V
DD
= 3.0V
V
DD
= 3.6V
V
DD
= 2.7V
V
DD
= 2.7V
V
DD
= 2.7V
V
DD
= 2.7V
V
DD
= 3.6V
V
DD
= 2.7V
V
DD
= 2.7V
V
DD
= 2.7V
V
DD
= 2.7V
V
IN
= 0V
V
IN
= 0V
V
IN
= V
DD
V
IN
= V
DD
V
IN
= 0V
V
IN
= V
DD
I
OL
= 0.25mA
I
OH
= 0.25mA
V
OL
= 0.4V
V
OH
= V
DD
−
0.4V
V
OL
= 0V
V
OH
= V
DD
V
DD
= 3.6V
V
DD
= 3.6V
V
DD
= 3.6V
V
DD
= 3.6V
V
DD
= 3.6V
V
DD
= 3.6V
V
DD
= 2.7V
V
DD
= 2.7V
V
DD
= 2.7V
V
DD
= 2.7V
V
DD
= 3.6V
V
DD
= 3.6V
Condition
min
2.7
–
–
–
–
200
20
340
20
–
0.3
0.3
–
V
DD
−
0.3
–
–
–
–
–
–
–
V
DD
−
0.4
0.25
0.25
–
–
typ
–
3.3
–
4
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
max
3.6
–
mA
5.2
–
mA
8
–
–
–
–
10
–
–
0.3
–
50
50
50
50
100
100
0.4
–
–
–
100
100
MHz
MHz
MHz
MHz
MHz
Vp-p
Vp-p
V
V
µA
µA
µA
µA
nA
nA
V
V
mA
mA
nA
nA
V
Unit
I
DD2
f
max1
f
max2
f
max1
f
max2
f
min
V
AC1
V
AC2
V
IL
V
IH
I
IL1
I
IL2
I
IH1
I
IH2
I
LL
I
LH
V
OL
V
OH
I
OL
I
OH
I
OZL
I
OZH
f
FIN
= 200MHz (300mVp-p sine wave), f
XIN
= 20MHz (300mVp-p sine wave), TR = HIGH
f
FIN
= 340MHz (300mVp-p sine wave), f
XIN
= 20MHz (300mVp-p sine wave), TR = HIGH
Signal generator AC-coupled input with 50Ω termination.
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