Memory for Plug & Play
DDR/DDR2
(For memory module) SPD Memory
BR34E02FVT-W,BR34E02NUX-W
●Description
BR34E02FVT-W is 256×8 bit Electrically Erasable PROM (Based on Serial Presence Detect)
●Features
1) 256×8 bit architecture serial EEPROM
2) Wide operating voltage range: 1.7V-3.6V
3) Two-wire serial interface
4) High reliability connection using Au pads and Au wires
5) Self-Timed Erase and Write Cycle
6) Page Write Function (16byte)
7) Write Protect Mode
Settable Reversible Write Protect Function: 00h-7Fh
Write Protect 1 (Onetime Rom)
: 00h-7Fh
Write Protect 2 (Hardwire WP PIN)
: 00h-FFh
8) Low Power consumption
Write
(at 1.7V ) :
0.4mA (typ.)
Read
(at 1.7V ) :
0.1mA(typ.)
Standby ( at 1.7V ) :
0.1µA(typ.)
9) DATA security
Write protect feature (WP pin)
Inhibit to WRITE at low V
CC
10) Compact package: TSSOP-B8, VSON008X2030
11) High reliability fine pattern CMOS technology
12) Rewriting possible up to 1,000,000 times
13) Data retention: 40 years
14) Noise reduction Filtered inputs in SCL / SDA
15) Initial data FFh at all addresses
●BR34E02-W
Series
Capacity
2Kbit
No.09002EBT03
Bit format
256X8
Type
BR34E02-W
Power Source Voltage
1.7V½3.6V
TSSOP-B8
●
VSON008X2030
●
●Absolute
Maximum Ratings (Ta=25℃)
Parameter
Supply Voltage
Power Dissipation
Storage Temperature
Operating Temperature
Terminal Voltage (A0)
Terminal Voltage (etcetera)
* Reduce by 3.3mW(*1), 3.0 mW(*2)/C over 25C
Symbol
V
CC
Pd
Tstg
Topr
-
-
Rating
-0.3½+6.5
330(BR34E02FVT-W)
300(BR34E02NUX-W)
-65½+125
-40½+85
-0.3½10.0
-0.3½V
CC
+0.3
Unit
V
*1
*2
mW
℃
℃
V
V
●Recommended
operating conditions
Parameter
Supply Voltage
Input Voltage
Symbol
V
CC
ＶIN
Rating
1.7½3.6
0½V
CC
Unit
V
V
www.rohm.com
© 2009 ROHM Co., Ltd. All rights reserved.
1/18
2009.09 - Rev.B
BR34E02FVT-W, BR34E02NUX-W
●Memory
cell characteristics(Ta=25℃, V
CC
=1.7V½3.6V)
Specification
Parameter
Min.
Typ.
*1
Write / Erase Cycle
1,000,000
-
*1
Data Retention
40
-
*1:Not 100% TESTED
Technical Note
Max.
-
-
Unit
Cycles
Years
●Electrical
characteristics - DC(Unless otherwise specified Ta=-40℃½+85℃, V
CC
=1.7V½3.6V)
Specification
Parameter
Symbol
Unit
Test Condition
Min.
Typ.
Max.
"H" Input Voltage
VIH1
0.7 V
CC
-
Vcc+0.3
V
"L" Input Voltage
VIL1
-
-
0.3 V
CC
V
"L" Output Voltage 1
VOL1
-0.3
-
0.4
V IOL=2.1mA，2.5V≦V
CC
≦3.6V(SDA)
"L" Output Voltage 2
VOL2
-
-
0.2
V IOL=0.7mA，1.7V≦V
CC
＜2.5V(SDA)
Input Leakage Current 1
ILI1
-1
-
1
µA VIN=0V½V
CC
(A0,A1,A2,SCL)
Input Leakage Current 2
ILI2
-1
-
15
µA VIN=0V½V
CC
(WP)
Input Leakage Current 3
ILI3
-1
-
20
µA VIN=VHV(A0)
Output Leakage Current
ILO
-1
-
1
µA VOUT=0V½V
CC
V
CC
=1.7V,fSCL=100kHz，tWR=5ms
Byte Write
ICC1
-
-
1.0
mA
Page Write
Write Protect
V
CC
=3.6V,fSCL=100kHz, tWR=5ms
Byte Write
Operating Current
ICC2
-
-
3.0
mA
Page Write
Write Protect
V
CC
=3.6V,fSCL=100kHz
Random Read
ICC3
-
-
0.5
mA
Current Read
Sequential Read
V
CC
=3.6V,SDA,SCL= V
CC
Standby Current
ISB
-
-
2.0
µA
A0,A1,A2=GND,WP=GND
A0 HV Voltage
VHV
7
-
10
V VHV-Vcc≧4.8V
○Note:
This IC is not designed to be radiation-resistant.
●lectrical
characteristics - AC(Unless otherwise specified Ta=-40℃½+85℃, VCC =1.7V½3.6V)
STANDARD-MODE
FAST-MODE
1.7V≦V
CC
≦5.5V
2.5V≦V
CC
≦5.5V
Parameter
Symbol
Min.
Typ.
Max.
Min.
Typ.
Max.
Clock Frequency
fSCL
-
-
400
-
-
100
Data Clock High Period
tHIGH
0.6
-
-
4.0
-
-
Data Clock Low Period
tLOW
1.2
-
-
4.7
-
-
*1
SDA and SCL Rise Time
tR
-
-
0.3
-
-
1.0
*1
SDA and SCL Fall Time
tF
-
-
0.3
-
-
0.3
Start Condition Hold Time
tHD:STA
0.6
-
-
4.0
-
-
Start Condition Setup Time
tSU:STA
0.6
-
-
4.7
-
-
Input Data Hold Time
tHD:DAT
0
-
-
0
-
-
Input Data Setup Time
tSU:DAT
100
-
-
250
-
-
Output Data Delay Time
tPD
0.1
-
0.9
0.1
-
3.5
Output Data Hold Time
tDH
0.1
-
-
0.1
-
-
Stop Condition Setup Time
tSU:STO
0.6
-
-
4.0
-
-
Bus Free Time
tBUF
1.2
-
-
4.7
-
-
Write Cycle Time
tWR
-
-
5
-
-
5
Noise Spike Width (SDA
tI
-
-
0.1
-
-
0.1
and SCL)
WP Hold Time
tHD：WP
0
-
-
0
-
-
WP Setup Time
tSU：WP
0.1
-
-
0.1
-
-
WP High Period
tHIGH：WP
1.0
-
-
1.0
-
-
*1：Not 100％ TESTED
Unit
kHz
µs
µs
µs
µs
µs
µs
ns
ns
µs
µs
µs
µs
ms
µs
ns
µs
µs
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© 2009 ROHM Co., Ltd. All rights reserved.
2/18
2009.09 - Rev.B
BR34E02FVT-W, BR34E02NUX-W
Technical Note
■Fast
/ Standard Modes
Fast mode and Standard mode differ only in operation frequency. Operations performed at 100kHz are considered in
"Standard-mode", while those conducted at 400kHz are in "Fast-mode".
Please note that these clock frequencies are maximum values. At lower power supply voltage it is difficult to operate at high speeds.
The EEPROM can operate at 400kHz, between 2.5V and 3.6V, and at 100kHz from 1.7V-2.5V.
●Synchronous
Data Timing
tR
SCL
tF
tHIGH
SCL
tHD:STA
SDA
(IN)
tBUF
SDA
(OUT)
tPD
tDH
tSU:DAT
tLOW
tHD:DAT
tSU:STA
SDA
tHD:STA
tSU:STO
START BIT
STOP BIT
Fig.1-(a) Synchronous Data Timing
○SDA
data is latched into the chip at the rising edge
○
of SCL clock.
○Output
data toggles at the falling edge of SCL clock.
SCL
SCL
Fig.1-(b) Start/Stop Bit Timing
DATA(1)
SDA
D1
D0
ACK
DATA(n)
ACK
½WR
SDA
D0
WRITE DATA(n)
ACK
t
WR
STOP CONDITION
START CONDITION
WP
Stop Condition
tSU：WP
½HD：WP
Fig.1-(c) Write Cycle Timing
Fig.1-(d) WP Timing Of The Write Operation
SCL
DATA(1)
SDA
D1
D0
ACK
tHIGH:WP
WP
DATA(n)
ACK
tWR
Fig.1-(e) WP Timing Of The Write Cancel Operation
○For
WRITE operation, WP must be "Low" from the rising edge of the
clock (which takes in D0 of first byte) until the end of tWR. (See
Fig.1-(d) ) During this period, WRITE operation can be canceled by
setting WP "High".（See Fig.1-(e)）
○When
WP is set to "High" during tWR, WRITE operation is
immediately ceased, making the data unreliable. It must then be
re-written.
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© 2009 ROHM Co., Ltd. All rights reserved.
3/18
2009.09 - Rev.B
BR34E02FVT-W, BR34E02NUX-W
●Block
diagram
Technical Note
A0 1
8bit
PROTECT_MEMORY_ARRY
2Kbit_MEM
ORY_ARRY
8 V
CC
8bit
A1 2
ADDRESS
DECODER
8bit
SLAVE , WORD
ADDRESS
GS
STOP
DATA
REGISTE
7 WP
START
A2 3
CONTOROL LOGIC
ACK
6 SCL
GND 4
HIGH VOLTAGE
V
CC
LEVEL
5 SDA
Fig.2 Blo
●Pinout
diagram and description
Pin Name
A0 1
A1 2
A2 3
GND 4
Fig.3 Pin Configuration
BR34E02FVT-W
BR34E02NUX-W
Input/Output
-
-
IN
IN
IN / OUT
IN
Power Supply
Ground 0V
Functions
8 V
CC
7 WP
6 SCL
V
CC
GND
A0,A1,A2
SCL
SDA
Slave Address Set.
Serial Clock Input
Slave and Word Address,
Serial Data Input, Serial Data Output
Write Protect Input
*2
*1
5 SDA
WP
*1 Open drain output requires a pull-up resistor.
*2 WP Pin has a Pull-Down resistor. Please leave unconnected or
connect to GND when not in use.
●Electrical
characteristics curves
The following characteristic data are typ. value.
6
5
4
VIL1,2[V]
1
0.8
SPEC
3
2
Ta=85℃
Ta=-40℃
Ta=25℃
VOL1[V]
0.6
SPEC
0.4
Ta=85℃
0.2
Ta=85℃
Ta=-40℃
Ta=25℃
Ta=25℃
1
0
0
1
2
VCC[V]
3
SPEC
0
4
Ta=-40℃
0
1
2
IOL1[mA]
3
4
Fig.4 "H" Input Voltage VIH
(A0,A1,A2,SCL,SDA,WP)
1
Fig.5 "L" Input Voltage VIL
(A0,A1,A2,SCL,SDA,WP)
1.2
Fig.6 "L" Output Voltage VOL1-IOL1
(V
CC
=2.5V)
16
SPEC
0.8
1
12
0.8
ILI1[
μ
A]
VOL2[V]
0.6
0.6
0.4
4
0.2
ILI2[μA]
8
SPEC
0.4
Ta=85℃
SPEC
Ta=25℃
0.2
Ta=-40℃
0
0
1
2
IOL2[mA]
3
4
0
0
1
2
VCC[V]
Ta=85℃
Ta=25℃
Ta=-40℃
0
3
4
0
1
Ta=85℃
Ta=25℃
Ta=-40℃
2
VCC[V]
3
4
Fig.7 "L" Output Voltage VOL2-IOL2
(V
CC
=1.7V)
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© 2009 ROHM Co., Ltd. All rights reserved.
Fig.8 Input Leakage Current ILI1
(A0,A1,A2,SCL,SDA)
4/18
Fig.9 Input Leakage Current ILI2
(WP)
2009.09 - Rev.B
BR34E02FVT-W, BR34E02NUX-W
Technical Note
3.5
SPEC1
0.6
0.5
½SCL=400kHz(V
CC
≧2.5V)
fSCL=100kHz(1.7V≦Vcc＜２．５V)
DATA=AA
SPEC
2.5
SPEC
3
2.5
ICC1,2[mA]
2
1.5
SPEC2
2
fSCL=100kHz
DATA=AAh
0.4
ICC3[mA]
0.3
0.2
0.1
ISB[μA]
Ta=85℃
Ta=25℃
1.5
1
1
0.5
0
0
Ta=25℃
Ta=85℃
Ta=-40℃
0.5
Ta=40℃
Ta=85℃
Ta=25℃
Ta=-40℃
0
1
2
VCC[V]
3
4
0
1
2
VCC[V]
3
4
0
0
1
2
VCC[V]
3
4
Fig.10 Write Operating Current ICC1,2
(fSCL=100kHz,400kHz)
Fig.11 Read Operating Current ICC3
(fSCL=400kHz)
Fig.12 Standby Current ISB
10000
Ta=85℃
Ta=25℃
Ta=-40℃
5
SPEC2
5
SPEC2
4
4
1000
fSCL[kHz]
tLOW[μs]
SPEC1
tHIGH[μs]
3
SPEC1:FAST-MODE
SPEC2:STANDARD-MODE
3
SPEC1:FAST-MODE
SPEC2:STANDARD-MODE
100
SPEC2
2
Ta=-40℃
Ta=25℃
Ta=85℃
SPEC1
2
SPEC1
10
SPEC1:FAST-MODE
SPEC2:STANDARD-MODE
Ta=85℃
Ta=25℃
Ta=-40℃
1
1
1
0
1
2
VCC[V]
3
4
0
0
1
2
VCC[V]
3
4
0
0
1
2
VCC[V]
3
4
Fig.13 Clock Frequency fSCL
Fig.14 Data Clock High Period tHigh
Fig.15 Data Clock Low Period tLow
5
SPEC2
5
50
SPEC2
SPEC1,2
4
tHD:STA[μs]
4
0
tHD:DAT(HIGH)[μs]
=85℃
Ta=25℃
Ta=-40℃
tSU:STA[μs]
3
SPEC1:FAST-MODE
SPEC2:STANDARD-MODE
3
SPEC1:FAST-MODE
SPEC2:STANDARD-MODE
2
-50
2
Ta=-40℃
Ta=25℃
Ta=85℃
1
SPEC1
1
Ta=-40℃
Ta=25℃
Ta=85℃
SPEC1
-100
SPEC1:FAST-MODE
SPEC2:STANDARD-MODE
-150
0
0
1
2
VCC[V]
3
4
0
0
1
2
VCC[V]
3
4
-200
0
1
2
VCC[V]
3
4
Fig.16 Start Condition Hold Time
tHD:STA
Fig.17 Start Condition Setup Time
tSU:STA
FiagmDag.18 ck Di
Ta
rata
HoldimtHD:DAT(High)
50
300
SPEC2
300
SPEC2
0
tHD:DAT(LOW)[μs]
SPEC1,2
200
tSU:DAT(HIGH)[ns]
tSU:DAT(LOW)[ns]
200
SPEC1
-50
SPEC1:FAST-MODE
SPEC2:STANDARD-MODE
100
-100
Ta=85℃
Ta=85℃
SPEC1
Ta=25℃
Ta=-40℃
100
Ta=85℃
0
0
Ta=25℃
Ta=-40℃
SPEC1:FAST-MODE
SPEC2:STANDARD-MODE
-150
Ta=25℃
Ta=-40℃
-100
SPEC1:FAST-MODE
SPEC2:STANDARD-MODE
-100
-200
0
1
2
VCC[V]
3
4
-200
0
1
2
VCC[V]
3
4
-200
0
1
2
VCC[V]
3
4
Fig.19 Data Hold Time
tHD:DAT(LOW)
Fig.20 Input Data Setup Time
tSU:DAT(HIGH)
Fig.21 Input Data Setup Time
tSU:DAT(LOW)
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© 2009 ROHM Co., Ltd. All rights reserved.
5/18
2009.09 - Rev.B
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