HRF-AT4511
15.5 dB, DC-4GHz, 5 Bit
Serial Digital Attenuator
Features
•
•
•
•
•
•
Very Low DC Power Consumption
Attenuation In Steps From 0.5 dB To 15.5 dB
Single Or Dual Power Supply Voltages
Serial Data Interface
50 Ohm Compatible Impedance
TM
Space Saving LPCC Surface Mount Packaging
Package Photo goes
here
Product Description
The Honeywell HRF-AT4511 is a 5-bit digital
attenuator that is ideal for use in broadband
communication system applications that require
accuracy, speed and low power consumption. The
HRF-AT4511 is manufactured with Honeywell's
patented Silicon On Insulator (SOI) CMOS
manufacturing
technology, which provides the
performance of GaAs with the economy and
integration capabilities of conventional CMOS.
HRF-AT4511 in LPCC™ Package
RF Electrical Specifications @ + 25
o
C
Parameter
Insertion Loss
Test Condition
Frequency
DC – 0.5 GHz
2.0 GHz
3.0 GHz
4.0 GHz
1.0 GHz
2.0 GHz
1.0 GHz
2.0 GHz
Minimum
Typical
1.60
2.00
2.20
3.60
23.0
21.5
29.0
28.0
35.5
Maximum
1.80
2.10
2.40
3.80
Units
dB
dB
dB
dB
dBm
dBm
dBm
dBm
dBm
1dB Compression
1dB Compression
Input IP3
VSS = 0V, Input Power
VSS = - 3, Input Power
VSS = 0V Two-tone inputs
2.0 GHz
Up To +5 dBm @ 0 dBm
Attenuation
Input IP3
V
ss
= - 3
Two-tone inputs Up To + 5
2.0 GHz
dBm @ 0 dBm Attenuation
Return Loss*
Any Bit or Combination of
DC - 4.0 GHz
Bits
1.0 GHz
Attenuation Accuracy
All attenuation states
2.0 GHz
All attenuation states
3.0 GHz
All attenuation states
4.0 GHz
All attenuation states
Trise, Tfall*
10% To 90%
Ton, Toff (Tpd)
50% Cntl To 90%/10%RF
Transients
In-Band
T clock Period (Tprd)*
T high / T low = ½ minimum clock period
T data set up (Tsup)*
Set up to rising edge of clock
T data hold (Thld)*
Data hold after rising edge of clock
T latch set up (Tlsup)*
Data set up to falling edge of OE
0.01uF Decoupling Capacitors Required On Power Supply Rails.
*By design
Web Site:
Email:
2002 4511W
www.mysoiservices.com
mysoiservices@honeywell.com
Published June 2002
Page 1
37.0
-11
-15
+/-(0.17 + 3% of programmed IL)
+/-(0.22 + 3% of programmed IL)
+/-(0.33 + 3% of programmed IL)
+/-(0.45 + 3% of programmed IL)
10
15
30
50
5
2
5
dBm
dB
dB
dB
dB
dB
nS
nS
mV
nS
nS
nS
nS
________________________________________________________________________________________________________
Honeywell
Solid State Electronics Center
12001 State Highway 55
Plymouth, Minnesota 55441-4799
1-800-323-8295
HRF-AT4511
Functional Schematic
DC Electrical Specifications @ + 25
o
C
Parameter
V
DD
V
SS
I
DD
Power Supply Current
CMOS Logic level (0)
0
CMOS Logic level (1)
V
DD
– 0.8
Input Leakage Current
* Note, performance curves are for V
DD
= +5.0 +/- 10%
Minimum
3.3*
Typical
5.0
Maximum
-5.0
2
0.8
V
DD
10
Units
V
V
mA
V
V
uA
Absolute Maximum Ratings
2
Parameter
Input Power
V
DD
V
SS
ESD Voltage
Operating Temperature
Storage Temperature
Digital Inputs
Absolute Maximum
+ 35
+6.0
-5.5
400
-40 To +85
-65 To +125
V
DD
+0.6 max to V
SS
-0.6 min
Units
dBm
V
V
V
Degrees C
Degrees C
V
(Note 2) Operation of this Device beyond any of these parameters may cause permanent damage.
Latch-Up:
Unlike conventional CMOS digital attenuators, Honeywell's HRF-AT4511 is immune to latch-up.
ESD Protection:
Although the HRF-AT4511 contains ESD protection circuitry on all digital inputs, conventional precautions should
be taken to ensure that the Absolute Maximum Ratings are not exceeded.
.
________________________________________________________________________________________________________
Web Site:
Email:
2002 4511W
www.mysoiservices.com
mysoiservices@honeywell.com
Published June 2002
Page 2
Honeywell
Solid State Electronics Center
12001 State Highway 55
Plymouth, Minnesota 55441-4799
1-800-323-8295
HRF-AT4511
Package Outline Drawing
4.0 mm
This package conforms to the LPCC
TM
4 X 4 mm 16 lead body dimensions.
See ASAT LPCC Marketing Outline Dwg. # DGMJ00004 Latest Rev. at
http://www.asat.com
for additional dimensional information.
4.0 mm
Pin Configuration
Pin
1
2
3
4
5
6
7
8
Function
VDD
GROUND
RF INPUT
GROUND
GROUND
GROUND
GROUND
GROUND
Pin
9
10
11
12
13
14
15
16
Function
GROUND
RF OUTPUT
GROUND
VSS
DIGITAL GROUND
OE
CLK
DATA
Serial Data Load
Serial data is shifted into the register on the rising edge of clock, MSB first. The state of “OE” will not affect the shifting
of data. The rising edge of the “OE” signal will be the clock for the transfer of shifted data. Latched new data occurs
one prop delay after the rising edge of “OE”. See the Electrical Spec Table for AC parameters.
________________________________________________________________________________________________________
Web Site:
Email:
2002 4511W
www.mysoiservices.com
mysoiservices@honeywell.com
Published June 2002
Page 3
Honeywell
Solid State Electronics Center
12001 State Highway 55
Plymouth, Minnesota 55441-4799
1-800-323-8295
HRF-AT4511
Truth Table
Output
Reference Input
0.5 dB
1 dB
2 dB
4 dB
8 dB
15.5 dB
Operation: Data on serial input D is clocked into internal registers on the low to high transition of the Clock signal (CK).
The
register is sampled during the Output Enable (OE) low state and clocked into the register during the low-to-high
transition
S4
0
0
0
0
0
1
1
S3
0
0
0
0
1
0
1
S2
0
0
0
1
0
0
1
S1
0
0
1
0
0
0
1
S0
0
1
0
0
0
0
1
Evaluation Circuit Board
Honeywell's evaluation board provides an
easy to use method of evaluating the RF
performance of our attenuator. Simply
connect power, DC and RF signals to be
measuring attenuator performance in less
than 10 minutes.
HRF-AT4511 Evaluation Board
Evaluation Circuit Board Layout Design Details
Item
PCB
Attenuator
Chip Capacitor
RF Connector
DC Pin
Description
Impedance Matched Multi-Layer FR4
HRF-AT4511 Digital Attenuator
Panasonic Model ECU-E1C103KBQ Capacitor, .01uf 0402 10% 16V
Johnson Connectors Model 142-0701-801 SMA RF Coaxial Connector
Mil-Max Model 800-10-064-10-001 Header Pins
________________________________________________________________________________________________________
Web Site:
Email:
2002 4511W
www.mysoiservices.com
mysoiservices@honeywell.com
Published June 2002
Page 4
Honeywell
Solid State Electronics Center
12001 State Highway 55
Plymouth, Minnesota 55441-4799
1-800-323-8295
HRF-AT4511
Evaluation Circuit Board Connections
Digital
VDD
CLK
Gnd
Gnd
Data
OE
VSS
RF In
HRF-AT4511
Evaluation Board
Top View
RF Out
HRF-AT4511
Honeywell
Performance Curves
Insertion Loss
AT4511 Insertion Loss By Attenuation State Vs Frequency
Frequency (GHz)
0
0
-2
-4
0.5
1
1.5
2
2.5
3
3.5
4
S12(00000)
S12(00001)
S12(00010)
S12(00011)
S12(00100)
S12(00101)
S12(00110)
S12(00111)
S12(01000)
S12(01001)
S12(01010)
S12(01011)
S12(01100)
S12(01101)
S12(01110)
S12(01111)
S12(10000)
S12(10001)
S12(10010)
S12(10011)
S12(10100)
S12(10101)
S12(10110)
S12(10111)
S12(11000)
S12(11001)
S12(11010)
S12(11011)
S12(11100)
S12(11101)
S12(11110)
S12(11111)
Insertion Loss (dB)
-6
-8
-10
-12
-14
-16
-18
-20
________________________________________________________________________________________________________
Web Site:
Email:
2002 4511W
www.mysoiservices.com
mysoiservices@honeywell.com
Published June 2002
Page 5
Honeywell
Solid State Electronics Center
12001 State Highway 55
Plymouth, Minnesota 55441-4799
1-800-323-8295
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
