19-2285; Rev 0; 1/02
Quad Differential LVECL-to-LVPECL Translators
General Description
The MAX9420–MAX9423 are extremely fast, low-skew
quad LVECL-to-LVPECL translators designed for high-
speed signal and clock driver applications. The
devices feature ultra-low propagation delay of 336ps
and channel-to-channel skew of 17ps.
The four channels can be operated synchronously with
an external clock, or in asynchronous mode, deter-
mined by the state of the SEL input. An enable input
provides the ability to force all the outputs to a differen-
tial low state.
These devices operate with a negative supply voltage
of -2.0V to -3.6V, compatible with LVECL input signals.
The positive supply range is 2.375V to 3.6V for differen-
tial LVPECL output signals.
A variety of input and output terminations are offered for
maximum design flexibility. The MAX9420 has open
inputs and open-emitter outputs. The MAX9421 has
open inputs and 50Ω series outputs. The MAX9422 has
100Ω differential input impedance and open-emitter
outputs. The MAX9423 has 100Ω differential input
impedance and 50Ω series outputs.
The MAX9420–MAX9423 are specified for operation
from -40°C to +85°C, and are offered in space-saving
32-pin 5mm
✕
5mm TQFP and 32-lead 5mm
✕
5mm
QFN packages.
Features
o
>500mV Differential Output at 3.0GHz Clock
o
336ps (typ) Propagation Delay in Asynchronous
Mode
o
17ps (typ) Channel-to-Channel Skew
o
Integrated 50Ω Outputs (MAX9421/MAX9423)
o
Integrated 100Ω Inputs (MAX9422/MAX9423)
o
Synchronous/Asynchronous Operation
MAX9420–MAX9423
Ordering Information
PART
MAX9420EHJ
MAX9421EHJ
MAX9422EHJ
MAX9423EHJ
TEMP
RANGE
PIN-
DATA
OUTPUT
PACKAGE INPUT
Open
Open
Open
Open
100Ω
100Ω
100Ω
100Ω
Open
Open
50Ω
50Ω
Open
Open
50Ω
50Ω
-40°C to +85°C 32 TQFP
-40°C to +85°C 32 TQFP
-40°C to +85°C 32 TQFP
-40°C to +85°C 32 TQFP
MAX9420EGJ* -40°C to +85°C 32 QFN
MAX9421EGJ* -40°C to +85°C 32 QFN
MAX9422EGJ* -40°C to +85°C 32 QFN
MAX9423EGJ* -40°C to +85°C 32 QFN
Applications
Data and Clock Driver and Buffer
Central Office Backplane Clock Distribution
DSLAM Backplane
*Future
product—contact factory for availability.
Pin Configurations
OUT0
GND
V
CC
IN0
IN0
IN1
26
32
V
EE
SEL
SEL
CLK
CLK
EN
EN
1
2
3
4
5
6
7
8
9
IN3
10
IN3
11
V
CC
12
OUT3
13
OUT3
14
GND
15
IN2
16
IN2
31
30
29
28
27
IN1
25
24 V
CC
23 OUT1
22 OUT1
21 GND
20 GND
19 OUT2
18 OUT2
17 V
CC
Base Station
ATE
TOP VIEW
MAX9420
MAX9421
MAX9422
MAX9423
Functional Diagram appears at end of data sheet.
V
EE
TQFP (5mm x 5mm)
Pin Configurations continued at end of data sheet.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
OUT0
Quad Differential LVECL-to-LVPECL Translators
MAX9420–MAX9423
ABSOLUTE MAXIMUM RATINGS
V
CC
to GND ...........................................................-0.3V to +4.1V
V
EE
to GND............................................................-4.1V to +0.3V
Inputs to GND .............................................(V
EE
- 0.3V) to +0.3V
Differential Input Voltage .......................................................±3V
Continuous Output Current .................................................50mA
Surge Output Current........................................................100mA
Continuous Power Dissipation (T
A
= +70°C)
Single-Layer PC Board
32-Pin 5mm
✕
5mm TQFP
(derate 9.5mW/°C above +70°C) ................................761mW
32-Lead 5mm
✕
5mm QFN
(derate 21.3mW/°C above +70°C) .................................1.7W
Junction-to-Ambient Thermal Resistance in Still Air
32-Pin 5mm
✕
5mm TQFP......................................+105°C/W
32-Lead 5mm
✕
5mm QFN ......................................+47°C/W
Junction-to-Ambient Thermal Resistance with 500
LFPM Airflow
32-Pin 5mm
✕
5mm TQFP.........................................+73°C/W
Junction-to-Case Thermal Resistance
32-Pin 5mm
✕
5mm TQFP.........................................+25°C/W
32-Lead 5mm
✕
5mm QFN .........................................+2°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
ESD Protection
Human Body Model (IN_,
IN_)
........................................500V
Others.............................................................................1.2kV
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
EE
= -2.0V to -3.6V, V
CC
= 2.375V to 3.6V, GND = 0, MAX9420/MAX9422 outputs terminated with 50Ω ±1% to V
CC
- 2.0V. Typical val-
ues are at V
EE
= -3.3V, V
CC
= 3.3V, T
A
= +25°C, V
IHD
= -0.9V, V
ILD
= -1.7V, unless otherwise noted.) (Notes 1, 2, and 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
V
EE
+
1.4
V
EE
V
EE
≤
-3.0V
V
EE
> -3.0V
EN,
EN,
SEL,
SEL
, IN_, IN_,
CLK, or
CLK
= V
IHD
or V
ILD
EN,
EN,
SEL,
SEL,
CLK, or
CLK
= V
IHD
or V
ILD
0.2
0.2
-10
-10
86
100
TYP
MAX
UNITS
LVECL INPUTS (IN_,
IN_,
CLK,
CLK,
EN,
EN,
SEL,
SEL)
Differential Input High Voltage
Differential Input Low Voltage
Differential Input Voltage
V
IHD
V
ILD
V
ID
Figure 1
Figure 1
Figure 1
MAX9420/
MAX9421
Input Current
I
IH
, I
IL
MAX9422/
MAX9423
0
-0.2
3.0
V
EE
25
µA
25
114
Ω
V
V
V
Differential Input Resistance
(IN,
IN)
LVPECL OUTPUTS (OUT_,
OUT_)
Differential Output Voltage
Output Common-Mode Voltage
Internal Current Source
Output Impedance
R
IN
MAX9422/MAX9423
V
OH
-
V
OL
V
OCM
I
SINK
R
OUT
Figure 1
Figure 1
MAX9421/MAX9423, Figure 2
MAX9421/MAX9423, Figure 2
600
V
CC
-
1.5
6.5
40
V
CC
-
1.25
8.2
50
660
V
CC
-
1.1
10.0
60
mV
V
mA
Ω
2
_______________________________________________________________________________________
Quad Differential LVECL-to-LVPECL Translators
DC ELECTRICAL CHARACTERISTICS (continued)
(V
EE
= -2.0V to -3.6V, V
CC
= 2.375V to 3.6V, GND = 0, MAX9420/MAX9422 outputs terminated with 50Ω ±1% to V
CC
- 2.0V. Typical val-
ues are at V
EE
= -3.3V, V
CC
= 3.3V, T
A
= +25°C, V
IHD
= -0.9V, V
ILD
= -1.7V, unless otherwise noted.) (Notes 1, 2, and 3)
PARAMETER
POWER SUPPLY
Negative Supply Current
Positive Supply Current
I
EE
I
CC
OUT_,
OUT_
open
OUT_,
OUT_
open
MAX9421/MAX9422/
MAX9423
MAX9421/MAX9423
MAX9420/MAX9422
7
153
87
10
-180
105
mA
mA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX9420–MAX9423
AC ELECTRICAL CHARACTERISTICS
(V
EE
= -2.0V to -3.6V, V
CC
= 2.375V to 3.6V, GND = 0, outputs terminated with 50Ω ±1% to V
CC
- 2.0V. For SEL = high, CLK = high
or low, f
IN
= 2.0GHz. For SEL = low, F
IN
= 1.5GHz, CLK = 3.0GHz, input transition time = 125ps (20% to 80%), V
IHD
= V
EE
+ 1.4V to
0, V
ILD
= V
EE
to -0.2V, V
IHD
- V
ILD
= 0.2V to the smaller of 3.0V or |V
EE
|. Typical values are at V
EE
= -3.3V, V
CC
= 3.3V, GND = 0, T
A
= +25°C, V
IHD
= -0.9V, V
ILD
= -1.7V, unless otherwise noted.) (Note 4)
PARAMETER
IN-to-OUT Differential
CLK-to-OUT Differential
IN-to-OUT Channel-to-Channel
Skew (Note 5)
CLK-to-OUT Channel-to-
Channel Skew (Note 5)
Maximum Clock Frequency
Maximum Data Frequency
Added Random Jitter (Note 6)
SYMBOL
CONDITIONS
MIN
250
350
TYP
336
506
17
17
3.0
2
0.65
0.53
28
23
80
80
90
120
1.0
1.0
45
ps
(P-P)
45
ps
ps
ps
MAX
450
575
60
55
UNITS
ps
ps
ps
ps
GHz
GHz
ps
(RMS)
ps
(RMS)
t
PLH1,
t
PHL1
SEL = high, Figure 3
t
PLH2,
t
PHL2
SEL = low, Figure 4
t
SKD1
t
SKD2
f
CLK(MAX)
f
IN(MAX)
t
RJ
SEL = high
SEL = low
V
OH
- V
OL
≥
500mV, SEL = low
V
OH
- V
OL
≥
400mV, SEL = high
SEL = low, f
CLK
= 3.0GHz, f
IN
= 1.5GHz
SEL = high, f
IN
= 2GHz
SEL = low, f
CLK
= 3.0GHz, IN_ = 3.0Gbps,
2
23
- 1 PRBS pattern
t
DJ
SEL = high, IN_ = 3.0Gbps 2
23
- 1 PRBS
pattern
Figure 4
Figure 4
Figure 3
Added Deterministic Jitter
(Note 6)
IN-to-CLK Setup Time
CLK-to-IN Hold Time
Output Rise Time
t
S
t
H
t
R
_______________________________________________________________________________________
3
Quad Differential LVECL-to-LVPECL Translators
MAX9420–MAX9423
AC ELECTRICAL CHARACTERISTICS (continued)
(V
EE
= -2.0V to -3.6V, V
CC
= 2.375V to 3.6V, GND = 0, outputs terminated with 50Ω ±1% to V
CC
- 2.0V. For SEL = high, CLK = high
or low, f
IN
= 2.0GHz. For SEL = low, F
IN
= 1.5GHz, CLK = 3.0GHz, input transition time = 125ps (20% to 80%), V
IHD
= V
EE
+ 1.4V to
0, V
ILD
= V
EE
to -0.2V, V
IHD
- V
ILD
= 0.2V to the smaller of 3.0V or |V
EE
|. Typical values are at V
EE
= -3.3V, V
CC
= 3.3V, GND = 0, T
A
= +25°C, V
IHD
= -0.9V, V
ILD
= -1.7V, unless otherwise noted.) (Note 4)
PARAMETER
Output Fall Time
Propagation Delay Temperature
Coefficient
SYMBOL
t
F
∆t
PD
/
∆T
Figure 3
CONDITIONS
MIN
TYP
90
0.2
MAX
120
1
UNITS
ps
ps/°C
Note 1:
Measurements are made with the device in thermal equilibrium.
Note 2:
Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 3:
DC parameters are production tested at +25°C. DC limits are guaranteed by design and characterization over the full oper-
ating temperature range.
Note 4:
Guaranteed by design and characterization. Limits are set to ±6 sigma.
Note 5:
Measured between outputs of the same part at the signal crossing points for a same-edge transition.
Note 6:
Device jitter added to the input signal.
Typical Operating Characteristics
(V
EE
= -3.3V, V
CC
= 3.3V, GND = 0, MAX9420/MAX9422 outputs terminated with 50Ω ±1% to V
CC
- 2.0V, SEL = high, f
CLK
= 3.0GHz,
f
IN
= 1.5GHz, input transition time = 125ps (20% to 80%), V
IHD
= -0.9V, V
ILD
= -1.7V, T
A
= +25°C, unless otherwise noted.)
SUPPLY CURRENT (I
CC
)
vs. TEMPERATURE
MAX9420 toc01
SUPPLY CURRENT (I
EE
)
vs. TEMPERATURE
MAX9420 toc02
OUTPUT AMPLITUDE (V
OH
- V
OL
)
vs. FREQUENCY
MAX9420/MAX9422
SEL = HIGH
OUTPUT AMPLITUDE (mV)
800
MAX9420 toc03
100
95
SUPPLY CURRENT (mA)
90
85
80
75
70
-40
-15
10
35
60
MAX9420/MAX9422
SEL = HIGH
OUTPUTS NOT TERMINATED
9
MAX9420/MAX9422
SEL = HIGH
OUTPUTS NOT TERMINATED
1000
OUTPUT AMPLITUDE (mV)
8
7
600
6
400
5
200
4
85
-40
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
0
0
500
1000 1500 2000 2500 3000 3500
IN_ FREQUENCY (MHz)
OUTPUT RISE/FALL TIME
vs. TEMPERATURE
MAX9420 toc04
IN-TO-OUT PROPAGATION DELAY
vs. TEMPERATURE
MAX9420 toc05
CLK-TO-OUT PROPAGATION DELAY
vs. TEMPERATURE
MAX9420/MAX9422
SEL = LOW
MAX9420 toc06
100
MAX9420/MAX9422
SEL = HIGH
OUTPUT RISE/FALL TIME (ps)
95
t
R
t
F
85
370
360
PROPAGATION DELAY (ps)
350
340
330
t
PHL1
320
310
300
t
PLH1
MAX9420/MAX9422
SEL = HIGH
600
575
PROPAGATION DELAY (ps)
550
525
500
475
450
425
t
PLH2
t
PHL2
90
80
75
-40
-15
10
35
60
85
TEMPERATURE (°C)
290
-40
-15
10
35
60
85
TEMPERATURE (°C)
-40
-15
10
35
60
85
TEMPERATURE (°C)
4
_______________________________________________________________________________________
Quad Differential LVECL-to-LVPECL Translators
Pin Description
PIN
1, 8
NAME
V
EE
FUNCTION
Negative Supply Voltage. Bypass V
EE
to GND with 0.1µF and 0.01µF ceramic capacitors. Place the
capacitors as close to the device as possible with the smaller value capacitor closest to the device.
Noninverting Differential Select Input. Setting SEL = high and
SEL
= low (differential high) enables all four
channels to operate asynchronously. Setting SEL = low and
SEL
= high (differential low) enables all four
channels to operate in synchronous mode.
Inverting Differential Select Input
Inverting Differential Clock Input. A rising edge on CLK (and falling on
CLK)
transfers data from the inputs to
the outputs when SEL = differential low.
Noninverting Differential Clock Input
Noninverting Differential Output Enable Input. Setting EN = high and
EN
= low (differential high) enables the
outputs. Setting EN = low and
EN
= high (differential low) drives the output low.
Inverting Differential Output Enable Input
Noninverting Differential Input 3
Inverting Differential Input 3
Positive Supply Voltage. Bypass V
CC
to GND with 0.1µF and 0.01µF ceramic capacitors. Place the
capacitors as close to the device as possible with the smaller value capacitor closest to the device.
Inverting Differential Output 3
Noninverting Differential Output 3
Ground
Noninverting Differential Input 2
Inverting Differential Input 2
Inverting Differential Output 2
Noninverting Differential Output 2
Noninverting Differential Output 1
Inverting Differential Output 1
Inverting Differential Input 1
Noninverting Differential Input 1
Noninverting Differential Output 0
Inverting Differential Output 0
Inverting Differential Input 0
Noninverting Differential Input 0
Exposed Paddle (MAX942_EGJ only). Connected to V
EE
internally. See package dimensions.
MAX9420–MAX9423
2
3
4
5
6
7
9
10
11, 17,
24, 30
12
13
14, 20,
21, 27
15
16
18
19
22
23
25
26
28
29
31
32
—
SEL
SEL
CLK
CLK
EN
EN
IN3
IN3
V
CC
OUT3
OUT3
GND
IN2
IN2
OUT2
OUT2
OUT1
OUT1
IN1
IN1
OUT0
OUT0
IN0
IN0
EP
_______________________________________________________________________________________
5