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5962-89755013X

产品描述OT PLD, 25ns, CMOS, CQCC28
产品类别可编程逻辑    可编程逻辑器件   
文件大小189KB,共11页
制造商Microchip(微芯科技)
官网地址https://www.microchip.com
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5962-89755013X概述

OT PLD, 25ns, CMOS, CQCC28

5962-89755013X规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称Microchip(微芯科技)
包装说明QCCN,
Reach Compliance Codecompliant
ECCN代码3A001.A.2.C
最大时钟频率30.3 MHz
JESD-30 代码S-CQCC-N28
JESD-609代码e0
长度11.43 mm
专用输入次数11
I/O 线路数量10
端子数量28
最高工作温度125 °C
最低工作温度-55 °C
组织11 DEDICATED INPUTS, 10 I/O
输出函数MACROCELL
封装主体材料CERAMIC, METAL-SEALED COFIRED
封装代码QCCN
封装形状SQUARE
封装形式CHIP CARRIER
峰值回流温度(摄氏度)NOT SPECIFIED
可编程逻辑类型OT PLD
传播延迟25 ns
认证状态Not Qualified
筛选级别MIL-STD-883 Class B
座面最大高度2.41 mm
最大供电电压5.5 V
最小供电电压4.5 V
标称供电电压5 V
表面贴装YES
技术CMOS
温度等级MILITARY
端子面层TIN LEAD
端子形式NO LEAD
端子节距1.27 mm
端子位置QUAD
处于峰值回流温度下的最长时间NOT SPECIFIED
宽度11.43 mm
Base Number Matches1

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AT22V10/L
Features
High Speed Programmable Logic Device
15 ns Max Propagation Delay
5 V
±10%
Operation
Low Power CMOS Operation
Speed
Temp
I
CC
(mA)
"L"
-15,-20
All
Com./Mil. Com./Mil. Others
12/15
90/100
55
CMOS and TTL Compatible Inputs and Outputs
10
µA
Leakage Maximum
Reprogrammable - Tested 100% for Programmability
High Reliability CMOS Technology
2000 V ESD Protection
200 mA Latchup Immunity
Full Military, Commercial and Industrial Temperature Ranges
Dual-In-Line and Surface Mount Packages
High Speed
UV Erasable
Programmable
Logic Device
Logic Diagram
OE PRODUCT TERMS
12
INPUT PINS
PROGRAMMABLE
INTERCONNECT
AND
COMBINATORIAL
LOGIC ARRAY
1
LOGIC
OPTION
8 TO 16
PRODUCT
TERMS
(UP T0 10
FLIP-FLOPS)
OUTPUT
OPTION
10
I/O PINS
Description
The AT22V10 and AT22V10L are CMOS high performance EPROM-based Programma-
ble Logic Devices (PLDs). Speeds down to 15 ns and power dissipation as low as 12 mA
are offered. All speed ranges are specified over the full 5 V
±10%
range. All pins offer a
low
±10 µA
leakage.
The AT22V10L provides the optimum low power CMOS PLD solution, with low DC power
(8 mA typical) and full CMOS output levels. The AT22V10L significantly reduces total
system power and enhances system reliability.
Full CMOS output levels help reduce power in many other system components.
The AT22V10 and AT22V10L incorporate a variable product term architecture. Each out-
put is allocated from eight to 16 product terms, which allows highly complex logic functions
to be realized.
Two additional product terms are included to provide synchronous preset and asynchro-
nous reset. These terms are common to all 10 registers. All registers are automatically
cleared upon power up.
Register preload simplifies testing. A security fuse prevents unauthorized copying of pro-
grammed fuse patterns.
DIP/SOIC
PLCC
Vcc
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
CLK/IN
IN IN
IN
IN
IN
*
IN
IN
IN
8
*
1
VCC
I/O
I/O
I/O
I/O
I/O
22
*
I/O
I/O
I/O
Pin Configurations
Pin Name
CLK/IN
IN
I/O
*
VCC
Function
Clock and Logic Input
Logic Inputs
Bidirectional Buffers
No Internal Connection
+5 V Supply
CLK/IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
15
IN
IN
I/O
*
GND IN I/O
0023C
1-97

 
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