HSDL-3603
IrDA
®
Data Compliant 4 Mbit/s Infrared Transceiver
Data Sheet
Description
The HSDL-3603 is a low profile infrared transceiver
module that provides interface between logic and IR
signals for through-air, serial, half-duplex IR data-link.
The module is fully compliant to IrDA Date Physical
Layer Specifications v1.4 and IEC825-Class I Eye
Safe.
The HSDL-3603 can be shut down completely to
achieve very low power consumption. In the
shutdown mode, the PIN diode will be inactive and thus
producing very little photocurrent even under very
bright ambient light. Such features are ideal for mobile
devices that require low power consumption.
Applications
• Digital imaging
– Digital still cameras
– Photo-imaging printers
• Data communication
– Notebook computers
– Desktop PCs
– WinCE handheld products
– Personal Digital Assistants
– Printers
– Auto PCs
– Dongles
– Set-top box
• Digital imaging
– Digital cameras
– Photo-imaging printers
• Telecommunication products
– Mobile phones
– Pagers
• Electronic wallet
• Small industrial and medical instrumentation
– General data collection devices
– Patient and pharmaceutical data collection devices
• IR LANs
Features
• Fully compliant to IrDA 1.4 Fast Infrared (FIR) from 9.6
kbit/s to 4 Mbit/s
• Typical link distance > 1.5 m
• Miniature package
– Height: 3.90 mm (3.75 mm without shield)
– Width: 9.80 mm (9.3 mm without shield)
– Depth: 4.65 mm (4.4 mm without shield)
• Guaranteed temperature performance, -25 to 70°C
– Critical parameters are guaranteed over
temperature and supply voltage
• Low power consumption
– Low shutdown current (10 nA typical)
– Complete shutdown of TXD, RXD, and PIN diode
• Withstands >100 mV
p-p
power supply ripple typically
• V
CC
supply 2.7 to 5.25 volts
• Integrated optional EMI shield
• LED stuck-high protection
• Designed to accommodate light loss with cosmetic
windows
• IEC 825-Class 1 eye safe
• Interface to various super I/O and controller devices
Functional Block Diagram
V
CC
CX2
Pinout
REAR VIEW
V
CC
(6)
CX1
GND (8)
NC (7)
8
7
6
5
4
3
2
1
RECEIVER
Figure 2a. Rear view diagram with shield.
SD/MODE (5)
RXD (4)
REAR VIEW
OPTIONAL
SHIELD
HSDL-3603
TRANSMITTER
TXD (3)
LED C (2)
V
CC
R1
LED A (1)
8
7
6
5
4
3
2
1
Figure 2b. Rear view diagram without shield.
Figure 1. HSDL-3603 functional block diagram.
Ordering Information
Part Number
HSDL-3603-007
HSDL-3603-208
HSDL-3603-207
Packaging Type
Tape and Reel
Tape and Reel
Tape and Reel
Package
Front View
Top View
Front View
Quantity
1800
1800
1800
Marking Information
The unit is marked with
3603yyww on the shield.
3603 = Product name
yy
= year
ww = work week
Application Support Information
The Application Engineering
Group is available to assist you
with the application designs
associated with the HSDL-3603
infrared transceiver module. You
can contact them through your
local sales representatives for
additional details.
2
I/O Pins Configuration Table
Pin
1
2
3
Symbol
LED A
LED C
TXD
Description
LED Anode
LED Cathode
Transmit Data
I/O Type
Input
Output
Input,
Active High
Output,
Active Low
Function
This pin can be connected directly to V
CC
(i.e., without series resistor)
at less than 3 V. Please refer to Table 1 for V
CC
versus Series Resistor, R1.
Leave this pin unconnected.
This pin is used to transmit serial data when SD/Mode pin is low. If this
pin is held high longer than ~100
µs,
the LED would be turned off when
used in conjunction with the SD/Mode pin. TXD is low at initialization.
This pin is capable of driving a standard CMOS or TTL load. No external
pull-up or pull-down resistor is required. It is in tri-state mode when the
transceiver is in shutdown mode and during digital serial programming
operations. RXD is high at initialization.
The transceiver is in shutdown mode if this pin is high for more than
400
µs.
On the falling edge of this signal, the state of the TXD pin sampled
and used to set receiver low bandwidth (TXD=low) or high bandwidth
(TXD=high) mode. See Figure 3 and Figure 4 for bandwidth selection
timings. SD is low at initialization.
Regulated, 2.7 to 5.25 Volts.
4
RXD
Receive Data
5
SD/Mode Shutdown/
Mode Select
Input,
Active High
6
7
8
–
V
CC
NC
GND
Shield
Supply
Voltage
No Connect
Ground
EMI Shield
Supply
Voltage
No Connect
Ground
EMI Shield
Connect to system ground.
Connect to system ground via a low inductance trace. For best
performance, do not connect directly to the transceiver pin GND.
Recommended Application Circuit Components
Component
Recommended Value
R1
0
Ω ±
5%, 0.5 Watt, for 2.7 V
1.8
Ω ±
5%, 0.5 Watt, for 3.0 V
4.7
Ω ±
5%, 0.5 Watt, for 3.3 V
6.8
Ω ±
5%, 0.5 Watt, for 3.5 V
CX1
0.47
µF ±
20%, X7R Ceramic
CX2
6.8
µF ±
20%, Tantalum
Notes
1
2
Notes:
1. CX1 must be placed within 0.7 cm of the HSDL-3603 to obtain optimum noise immunity.
2. In environments with noisy power supplies, supply rejection performance can be enhanced
by including CX2, as shown in Figure 1: ”HSDL-3603 Functional Block Diagram“ on Page 2.
3
Bandwidth Selection Timing
The transceiver is in default SIR/
MIR mode when powered on.
User needs to apply the following
programming sequence to both
the SD and TXD inputs to enable
the transceiver to operate at FIR
mode.
V
IH
SD/MODE
50%
V
IL
t
S
t
H
V
IH
V
IH
SD/MODE
50%
V
IL
t
S
t
H
TXD
50%
50%
V
IL
TXD
50%
50%
V
IL
Figure 3. Bandwidth selection timing at SIR/MIR mode.
Figure 4. Bandwidth selection timing at FIR mode.
Setting the transceiver to SIR/MIR
Mode (9.6 kb/s to 1.152 Mbit/s)
1. Set SD/Mode input to logic
HIGH
2. TXD input should remain at
logic LOW
3. After waiting for t
S
≥
25 ns,
set SD/Mode to logic LOW, the
HIGH to LOW negative edge
transition will determine the
receiver bandwidth
4. Ensure that TXD input remains
low for t
H
≥
100 ns, the
receiver is now in SIR/MIR
mode
5. SD input pulse width for mode
selection should be > 50 ns.
Setting the transceiver to FIR
(4.0 Mbit/s) Mode
1. Set SD/Mode input to logic
HIGH
2. After SD/Mode input remains
HIGH at > 25ns, set TXD input
to logic HIGH, wait t
S
≥
25 ns
(from 50% of TXD rising edge
till 50% of SD falling edge)
3. Then set SD/Mode to logic
LOW, the HIGH to LOW
negative edge transition will
determine the receiver
bandwidth
4. After waiting for t
H
≥
100ns, set
the TXD input to logic LOW
5. SD input pulse width mode
selection should be > 50ns.
4
Transceiver I/O Truth Table
Inputs
TXD
Light Input to Receiver
High
Don’t Care
Low
High
Low
Don’t Care
Low
Don’t Care
SD
Low
Low
Low
High
Outputs
LED
On
Off
Off
Off
RXD
Not Valid
Low
High
High
Notes
1, 2
Notes:
1. In-band IrDA signals and data rates
≤
4Mbit/s.
2. RXD logic low is a pulsed response. The condition is maintained for a duration dependent on pattern and strength of the incident intensity.
Caution:
The BiCMOS inherent to the design of this component increases the component’s suscepti-
bility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be
taken in handling and assembly of this component to prevent damage and/or degradation, which
may be induced by ESD.
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