电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

80.0MHZCFPT-9060AS3CLF

产品描述ACMOS Output Clock Oscillator, 80MHz Nom, LEAD FREE, SMD, 6 PIN
产品类别无源元件    振荡器   
文件大小62KB,共4页
制造商C-MAC Automotive
官网地址https://cmac.com
标准
下载文档 详细参数 全文预览

80.0MHZCFPT-9060AS3CLF概述

ACMOS Output Clock Oscillator, 80MHz Nom, LEAD FREE, SMD, 6 PIN

80.0MHZCFPT-9060AS3CLF规格参数

参数名称属性值
是否无铅不含铅
是否Rohs认证符合
厂商名称C-MAC Automotive
Reach Compliance Codeunknown
其他特性TRI-STATE; ENABLE/DISABLE FUNCTION
老化1 PPM/FIRST YEAR
最大控制电压2.65 V
最小控制电压0.65 V
最长下降时间3 ns
频率调整-机械NO
频率稳定性0.3%
制造商序列号CFPT-9060
安装特点SURFACE MOUNT
标称工作频率80 MHz
最高工作温度70 °C
最低工作温度-20 °C
振荡器类型ACMOS
输出负载50 pF
物理尺寸14.7mm x 9.2mm x 6.2mm
最长上升时间3 ns
最大供电电压3.63 V
最小供电电压2.97 V
标称供电电压3.3 V
表面贴装YES
最大对称度45/55 %
Base Number Matches1

文档预览

下载PDF文档
CFPT-9050 Series
ISSUE 6 ; 23 DECEMBER 2004
Recommended for New Designs
Delivery Options
Frequency Stability
Temperature: see table
Typical Supply Voltage Variation ±10% < ±0.2 ppm*
Typical Load Coefficient 15pF ±5pF < ±0.2 ppm*
Please contact our sales office for current leadtimes
Description
* Depending on frequency and output type
Frequency Adjustment
A highly versatile series of surface mountable
14.7 x 9.2 x 6.2mm temperature compensated voltage
controlled crystal oscillators (TCVCXOs) for applications
where small size and high performance are pre-
requisites. This oscillator uses C-MAC’s latest custom
ASIC "Pluto", a single chip oscillator and analogue
compensation circuit, capable of sub 0.3 ppm
performance. Its wide frequency range, operating
temperature range, drive capability, coupled with its
high stability and linear frequency pulling make it the
ideal reference oscillator. Its ability to function down to
a supply voltage of 2.4V and low power consumption
makes it particularly suitable for mobile applications
Three options with external Voltage Control applied to
pad 1:
A - Ageing adjustment: > ±5ppm (Standard Option)
B - No frequency adjustment. Initial calibration @ 25°C
< ±0.5 ppm
C - High Pulling ±10ppm to ±50ppm can be available
depending on frequency and stability options.
Please consult our sales office
Linearity
Slope
Input resistance
Modulation bandwidth
Standard control voltage ranges:
Without reference voltage
Without reference voltage
With reference voltage
< 1%
Positive
> 100kΩ
> 2kHz
Standard Frequencies
9.6, 10.0, 12.8, 19.44, 20.0, 38.88, 49.152, 51.84MHz
Waveform
SURFACE MOUNT
TCXOs
Square HCMOS 15pF load
Square ACMOS 50pF max. load
Sinewave 10kΩ // 10pF AC-coupled
,
Clipped sinewave 10kΩ // 10pF AC-coupled
,
- Vs=5.0V 2.5V±2V
- Vs=3.3V 1.65V±1V
- Vc=0V to Vref
Reference Voltage, Vref (HCMOS/ACMOS only)
Supply Voltage
Optional reference voltage output on pad 5, suitable for
potentiometer supply or DAC reference.
1. No output (standard option)
2. 2.2V, for Min. Vs>2.4V
3. 2.7V, for Min. Vs>3.0V
4. 4.2V, for Min. Vs>4.5V
Maximum load current (mA) = Vref /10
Operating range 2.4 to 6.0V, see table
Current Consumption
HCMOS Typically
1+Frequency(MHz)*Supply(V)*{Load(pF)+15}*10
-3
mA
e.g. 20MHz, 5V, 15pF
4mA
ACMOS Typically
1+Frequency(MHz)*Supply(V)*{Load(pF)+23}*10
-3
mA
Sinewave, 6 to 12 mA depending on frequency
Clipped Sinewave, Typically
1+Frequency(MHz)*1.2*{Load(pF)+30}*10
-3
mA
For manual frequency adjustment (HCMOS/ACMOS output
only) connect an external 50kΩ potentiometer between
pad 5 (Reference Voltage) and pad 3 (GND) with wiper
connected to pad 1 (Voltage Control). Please specify
reference voltage as a part of the ordering code
Note: Please contact our sales office if a reference voltage
is required in combination with sine or clipped sinewave
output
Tri-state
Package Outline
14.7 x 9.2 x 6.2mm SMD
Ageing
Pad 2 open circuit or >0.6Vs output enabled
< 0.2Vs Tri-state
When Tri-stated, the output stage is disabled for all
output options, but the oscillator and compensation
circuit are still active (current consumption <1mA)
±1ppm maximum in first year
±3ppm maximum for 10 years
±1ppm maximum after reflow
Europe Tel: +44 (0)1460 270200
Americas Tel: +1 919 941 9333
Asia
Tel: +86 755 8826 5991
Fax: +44 (0)1460 72578
Fax: +1 919 941 9371
Fax: +86 755 8826 5990
Website: www.cmac.com
ddr3初始化失败
ddr初始化local_cal_fail为高,开始发现pll时钟没有锁住pll_lock一直为低,用函数信号发生器产生了一个稳定的时钟接上去。时钟锁住了,但是初始化还是失败,拿signaltop引入ddr信号调试,发现me ......
flying~ FPGA/CPLD
专为手机开发建立的交流群
QQ群:74481311 专门为从事手机软件开发的专业人员和业余爱好者建立的高级群,欢迎大家在线交流....
ld21502839 嵌入式系统
OPA2320:精密 CMOS 运算放大器datasheet&应用手册
器件介绍:The OPA320 (single) and OPA2320 (dual) are a new generation of precision, low-voltage CMOS operational amplifiers optimized for very low noise and wide bandwidth while op ......
EEWORLD社区 模拟与混合信号
帮帮看一下
#include "stm32f10x.h" // Device header #define PA0 GPIO_ReadInputDataBit(GPIOA,GPIO_Pin_0) #define PA1 GPIO_ReadInputDataBit(GPIOA,GPIO_Pin_1) #define PA ......
tajiong stm32/stm8
s3c2440 camera 疑惑(基于7113的视频采集)
各位大侠,小弟现在正在搞2440 的视频开发,初次涉及,想用7113来做视频采集,烦请各位给提供个简单的思路,或者是大致的方向,不胜感激...
AVR_AFA 嵌入式系统

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 1228  1045  2399  2665  264  23  4  56  17  50 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved