73S1113F
EMV Smart-Card Terminal Controller
with Built-in ISO-7816 Interface and USB
DATA SHEET
NOVEMBER 2005
DESCRIPTION
The
TERIDIAN
Semiconductor
Corporation
73S1113F is a CMOS single chip ISO-7816 smart-
card terminal micro-controller that implements all the
functions required to build a low-cost smart-card
terminal with a USB interface, suitable for various
applications including EMVCo compliant payment
terminals. Its enhanced set of features supports
several configurations allowing low component count
and a fast design cycle. Based on an 80C52 core, it
incorporates communication and man-machine
interfaces. The TERIDIAN 73S1113F device is
applicable to either portable or host-connected
applications. Embedded Flash memory makes the
TERIDIAN 73S1113F a complete system-on-chip
suitable for both development and production
phases.
This data-sheet presents the package and pin
description, as well as the electrical features that are
unique to the TERIDIAN 73S1113F. It also presents
a brief description of the architecture and of its
embedded functions.
Refer to the 73S11xxF Hardware User’s Guide for
more detailed information about the microcontroller
architecture, description of the registers, description
of the different blocks that are common to the
TERIDIAN 73S11xxF smart card terminal controller
family.
Also refer to the TERIDIAN 73S11xxF Software
User’s Guide for a complete description of the
Application Programming Interface (API).
APPLICATIONS
•
•
•
•
CCID-compliant PINpad Smart Card
Terminals
USB Smart Card Readers
Micosoft® WHQL-compliant Smart Card
Terminals
E-commerce Terminals
ADVANTAGES
•
•
•
•
•
True System-on-Chip solution, with built-in
communication interfaces and peripherals
Compact solution, that requires only a few
external components
Embedded 64kB Flash and 5kB RAM are the
largest memory size among 8-bit smart card
reader controllers in the industry
Low-cost solution for portable and host-
connected terminals
Software API (Application Programming
Interface) includes the ready-to-use protocol
layers for asynchronous cards and USB
Faster development time
Time-to-Market
Ready-to-use USB Smart Card reader
application, provided with a Microsoft WHQL
approved driver
•
Page: 1 of 19
©
2005 TERIDIAN Semiconductor Corporation
Rev 2.3
73S1113F
EMV Smart-Card Terminal Controller
with Built-in ISO-7816 Interface and USB
DATA SHEET
FEATURES
80C52 core:
12 clock-cycle / instruction
CPU clocked up to 24MHz (with a 12MHz crystal)
16-bit PC (64kB program linear memory address
space)
Memory:
64kB internal Flash (Program Memory)
128 Bytes Flash Info Memory Block
Flash memory guaranteed for 10,000 erase-write
cycles
1kB IRAM (internal RAM for registers) + 4kB
internal XRAM (User Data Memory)
Interface for external program / data memory
Boot-ROM loader program allows both In-System-
Programming and In-Application-Programming of
the embedded flash (ISP and IAP modes)
ISP programming mode can be permanently
disabled by protection fuses
Oscillator:
Single low-cost 12MHz crystal
An Internal PLL provides all the necessary clocks to
each block of the system
Interrupts:
Standard 80C52 2-priority level structure
8 different sources of interrupt
Power Down Modes:
2 standard 80C52 Power Down and IDLE modes
Timers:
(3) Standard 80C52 timers T0, T1 and T2
Built-in ISO-7816 card interface:
Independent step-up converter generates VCC for
the card (3V or 5V)
Compliant with EMV 4.0 (EMV2000)
Activation/Deactivation sequencers
Auxiliary I/O lines (C4-C8 signals)
4.5kV ESD protection on all interface pins
Communication with smart cards:
ISO-7816 UART 9600 to 115kbps (with 12MHz
crystal) for protocols T=0, T=1
2-Byte FIFO for transmit and receive
Hardware support to manage additional external
card interfaces
Communication interfaces:
Full-duplex serial interface (1200 to 115kbps
UART)
USB 1.1 Full Speed 12Mbps Interface (backward
compatible with USB 2.0), PC/SC compliant with 4
Endpoints:
-
Control (16B FIFO)
-
Interrupt IN (32B FIFO)
-
Bulk IN (128B FIFO)
-
Bulk OUT (128B FIFO)
Man-Machine Interface and I/Os:
5x5 Keyboard (hardware scanning, debouncing and
scrambling)
(7) Dedicated LCD I/Os (Control of any external
HD44780 standard LCD driver) – Can be also used
as standard I/Os
(8) User I/Os
Voltage Detection:
(1) Analog Input (Voltage detection range: 0.2V to
2.5V)
Operating Voltage:
2.7V to 3.6V (3V to 3.6V when USB is in use)
Operating Temperature:
0°C to 85°C
Package:
64 pin LQFP
Software:
Two-level Application Programming Interface (ANSI
C-language libraries)
USB, T=0/T=1 and EMV-compliant smart card
protocol layers
PIN Management functions compatible with CCID
requirements
Page: 2 of 19
©
2005 TERIDIAN Semiconductor Corporation
Rev 2.3
73S1113F
EMV Smart-Card Terminal Controller
with Built-in ISO-7816 Interface and USB
DATA SHEET
FUNCTIONAL DIAGRAM
ISP_Program
SEC
INT2
RESET
VPC
VNC
VCC2
Access Control
4kB XRAM
+
1kB IRAM
128B IFB
(Flash)
COL(4:0)
ROW(4:0)
5
5
64kB
Flash
ROM
Boot-Loader
Ext. Memory
Interface
DC-to-DC
Converter
CC2P
CC2N
VCCIN2
GND_RTN
Keyboard
Interface
LCD_DAT(3:0)
LCD_En
LCD_RW
LCD_RS
4
LCD I/Os
8052
Core
ISO-7816
UART
ISO-7816
Driver and
Sequencer
ICC#2
USR(7:0)
8
I/Os
VCC2
CLK2
RST2
IO2
C42
C82
DET_CARD2
Timer
T0
ANA_IN2
Timer
T1
8
Interface for
Ext. ICCs
PLL & Clock
Circuitry
12MHz Main
Oscillator
SCLK
SIO
OSCIN12
OSCOUT12
Vref Divider
2.5V
Vref.
Timer
T2
USB
Full Speed
12Mbps
Serial
UART
5
USB_D+
USB_D-
RX
TX
VPA
VNA
VPD
5
VND
Page: 3 of 19
©
2005 TERIDIAN Semiconductor Corporation
Rev 2.3
73S1113F
EMV Smart-Card Terminal Controller
with Built-in ISO-7816 Interface and USB
DATA SHEET
MICROCONTROLLER
The 73S1113F core is an 8-bit 80C52 micro-controller, with embedded 5kB of RAM (data memory) and 64kB of
flash (program memory). An additional Information Block Flash cell (128B IFB) is available for storage of device
ID, serial number, firmware version etc.
An embedded ROM boot-loader allows downloading of the flash memory (either program or IFB) through the
serial port. This programming mode can be forced externally (In-System-Programming = ISP mode) or also can
be called by the application (In-Application-Programming = IAP mode) through the Application Programming
Interface. The 73S1113F flash memory can also be programmed with a parallel PROM programmer. Embedded
security fuses allow the user to permanently disable the ISP mode. It allows the 73S1113F, once programmed
with an application, to run independently without possibility from the external world to re-download a non-
authorized application. Other features include:
•
The 73S1113F has an on-chip oscillator that requires a 12MHz crystal. Internal clock circuitry generates
clock signals to the different blocks and to the CPU (that can be clocked at 6, 12 or 24MHz).
•
The 73S1113F has the standard 8052 2-priority level interrupt structure, with 8 different interrupt sources:
2 external interrupts (pins INT2 and INT0), 3 timer interrupts, 1 serial/USB interrupt, 1 smart-card interrupt
and a shared interrupt (keypad and analog comparator inputs).
•
The 73S1113F incorporates 3 timers, T0, T1 and T2 that can be clocked internally or externally by the
respective input signals on the pins USR0, USR1 and USR2.
•
Standard 8052 Power Down mode and IDLE mode are supported for power saving modes. The clock for
each block, as well as the analog circuitry (analog input, voltage reference and USB transceiver) and the
DC-to-DC converter (VCC generator for the card) can be independently enabled or disabled by firmware
to optimize power consumption.
•
Management of the embedded card interface, peripherals and communication capabilities are controlled
by means of dedicated registers in RAM. Management of the interrupts, of the power saving modes and
of the clock circuitry is also controlled through registers.
ISO-7816 INTERFACE AND UART
The feature set of the TERIDIAN 73S1113F includes one built-in smart-card interface, controlled by an ISO-7816
compliant sequencer. The built-in smart card interface has a DC-DC converter, which is able to generate the card
power supply, VCC=3V or 5V. The sequencer handles the activation / deactivation of the card signals. The card
interface includes an input for the card presence switch (programmable polarity) and auxiliary I/O lines for C4 / C8
signals. A hardware ISO-7816 UART with a dedicated FIFO allows easy implementation of asynchronous card
protocols T=0 and T=1. This UART can be bypassed to allow a firmware UART to handle other protocols such as
synchronous card protocols. Control and use of the ISO-7816 UART is widely and easily configurable with
dedicated registers located in XRAM. A 2-line interface enables the 73S1113F to control additional external
smart card (ICC) interfaces, typically for multiple-SAM configurations. The ISO-7816 UART is shared between all
the smart card interfaces (internal and external).
COMMUNICATION, HUMAN-MACHINE INTERFACE AND I/Os
•
The 73S1113F has a full-speed (12Mbps) USB slave interface with 4 endpoints for implementation of
computer-connected terminals. A standard 8052 serial UART allows the 73S1113F to communicate with
any host or peripheral on a serial link, at a data transmission rate from 1200 to 115kbps. Communication
with a computer through RS232 can be easily implemented only using an external level shifter.
Keyboard implementation is supported with a built-in 5x5 keyboard interface with hardware scanning and
debouching. It also features a scrambling capability (change of the scanning order).
7 I/O lines are dedicated to control an external standard LCD driver, allowing a wide choice of LCDs to be
controlled by the 73S1113F, such as 7-wire, Hitachi-type HD44780.
Additional input/outputs feature 8 user I/Os and 1 analog input for voltage detection (for battery
monitoring or any DC voltage comparison).
©
2005 TERIDIAN Semiconductor Corporation
•
•
•
Page: 4 of 19
Rev 2.3
73S1113F
EMV Smart-Card Terminal Controller
with Built-in ISO-7816 Interface and USB
DATA SHEET
PIN DESCRIPTION
Pin Name
VND
VPD
VNA
VPA
VPC
VNC
OSCIN12
OSCOUT12
CLK2
IO2
RST2
CC2P
CC2N
VCC2IN
VCC2
C42
C82
DET_CARD2
SIO
SCLK
SEC
ANA_IN2
RESET
ISP_Program
Reserved
64 LQFP Pin #
3, 24, 34, 42, 57
4, 28, 37, 55, 64
62
60
51
44, 54
1
2
43
45
48
50
52
53
49
47
46
39
40
41
63
61
27
25
56
# Pins
5
5
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Type
GND
Supply
GND
Supply
Supply
GND
I
O
O
I/O
O
I/O
I/O
I
O
I/O
I/O
I
I/O
O
I
I
I
I
-
Digital ground
Description
Digital power. 2.7V - 3.6V
Must be greater than 3V when using the USB interface.
\Each pin to be decoupled to VND with a 0.1µF capacitor.
Analog ground
Analog power. 2.7V - 3.6V
To be decoupled to VNA with a 0.1µF capacitor.
DC/DC Step-up Converter power (2.7 - 3.6V). Each pin to be
decoupled to VNC with one 0.1µF and one 10µFcapacitor.
DC/DC Step-up Converter ground
12MHz crystal input.
Can drive clock in and leave OSCOUT12 unconnected
12MHz crystal output. Leave unconnected if not using a crystal
ICC Clock Signal
ICC I/O Signal
ICC RST Signal
Step-up Converter Capacitor 2 Positive Node
(0.68µF Low ESR)
Step-up Converter Capacitor 2 Negative Node
Card interface voltage supply for interface circuits – take
from VCC2 filter capacitor
ICC VCC Signal
Must be decoupled to GND with a 6.8µF low-ESR capacitor.
ICC C4 Signal
ICC C8 Signal
ICC presence contact input pin. Programmable polarity (to be
connected accordingly to the card presence switch with a pull-up /
pull-down)
I/O for external ICC interfaces. Internal pull-up configuration – no
external pull-up required.
ICC clock for external Smart-Card interfaces
Digital security input that controls the internal protection fuse.
Active High. Internal pull-down allows NC for normal operation.
When set, permanently deactivates the ISP programming mode.
Analog Input – (Voltage detection input 0.2V to 2.5V ±3%
73S1113F Reset. Active high
Forces internal Flash programming in ISP mode at reset. Active
High. 0 = Indicates the user does not want to program the flash if
checksum passes. Internal pull-down allows NC for normal
operation
To be connected to VND
Page: 5 of 19
©
2005 TERIDIAN Semiconductor Corporation
Rev 2.3
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